一个verilog语言描写的同步fifo,包括:Fifo using declared registers for storage和Fifo using (model of) standard mem
一个verilog语言描写的同步fifo,包括:Fifo using declared registers for storage和Fifo using (model of) standard mem...
一个verilog语言描写的同步fifo,包括:Fifo using declared registers for storage和Fifo using (model of) standard mem...
The PCI Utilities package contains a library for portable access to PCI bus configuration registers...
I2C Slave module The module contains N accessable Registers when in read Process, all Registers a...
st7109的datasheet,all hardware and registers is in...
MSP-FET430P140 Demo - USART0, SPI Interface to HC165/164 Shift Registers Description: Demonstrate...
this is ram both asynchronous and synchronous reset signals which is basic for any registers and bas...
MSP430f2013 ADC, LCD drivers using 74168 shift registers...
PCI-Express Lane Test Utility. Validates negotiated lane capability registers, returns error codes,...
■ High Performance, Low Power AVR® 8-Bit Microcontroller ■ Advanced RISC Architecture –120 Powerfu...
These 8-bit shift registers feature gated serial inputs andan asynchronous clear. A LOW logic le...