RTL+Design
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查看全部 1,226 份 →synopsys公司的专家讲解如何用systemverilog写testbence来验证rtl代码
synopsys公司的专家讲解如何用systemverilog写testbence来验证rtl代码
2014-01-02
185
cy7c68001FPGA上面用rtl代码区实现配置USB芯片的的VID、PID、DID
基于RTL代码实现FPGA对USB芯片的配置，支持设置VID、PID和DID，适用于USB设备开发与硬件调试。
2026-03-18
1
"TCP/IP + Ethernet network equipment design method" sample program
"TCP/IP + Ethernet network equipment design method" sample program
2014-01-19
137
The Design and Implementation of the 4.4BSD Operating System
The Design and Implementation of the 4.4BSD Operating System
2013-12-19
69
TOPSwitch Power Supply Design Techniques for EMI and Safety
TOPSwitch® Power Supply Design Techniques for EMI and Safety:Offline switchin
2024-01-22
7