源码文件
-w -lrts55x.lib MEMORY { RAM: origin = 07000h length = 06000h ROM: origin = 00100h length …
ROM+RAM 源代码
汇集 ROM+RAM 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
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源码文件
CHIP 33L05 ; chip name (33XXX) VER 1 ; this file version ; Map allocation (max 31 areas, 256bytes boundary) RAM 0 1FF…
源码文件
".\main.obj", ".\delay.obj", ".\display.obj", ".\key.obj", ".\RAM.obj", ".\ROM.obj", ".\SERIAL.obj", ".\TP.obj" TO "TP_RO…
源码文件
NAMES END SEGMENTS /* here all RAM/ROM areas of the device are listed. Used in PLACEMENT below. */ Z_RAM = REA…
源码文件
MEMORY { ram : ORIGIN = 0x20000000, LENGTH = 0xf000 rom : ORIGIN = 0x00000000, LENGTH = 0xf000 } SECTI…
源码文件
-stack 0x0500 -sysstack 0x0500 -heap 0x1000 -c -u _Reset -l rts55.lib MEMORY { PAGE 0: RAM(RWIX): origin=0x000100, …
源码文件
__S0 538 0 __S1 88 0 _Tmr0OutEn 2DB FFFFFD83 RAM lmul 85 0 CODE ldiv 31 0 CODE _main 17 0 CODE ?lmul 76 0 RAM ?ldiv 6E 0 RA…
源码文件
_Speed_Fcj 50 0 RAM __S0 6D0 0 __S1 E0 0 _Tmr0OutEn 54B FFFFFB61 RAM lmul A6 0 CODE ldiv 52 0 CODE wdiv CE 0 CODE _main 17 …
源码文件
__S0 5AD 0 __S1 8A 0 _Tmr0OutEn 2E3 FFFFFD7C RAM lmul 86 0 CODE wmul AD 0 CODE ldiv 32 0 CODE _main 17 0 CODE ?lmul 77 0 RA…
源码文件
?_IICNoAck DE 0 RAM _VidaoDateOut 4F0 0 CODE _IICRecAck C07 0 CODE ??_IICNoAck DE 0 RAM ?_VidaoDateOut C2 0 RAM ?_IICRecAck D…