RF+design
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1,468
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查看全部 1,468 份 →一个简单的Modular Design设计,源代码
一个简单的Modular Design设计,源代码，分别用Verilog和VHDL两种语言描述，本设计顶层模块由3个子模块组成.
2016-06-28
50
Simulation and Synthesis Techniques for Asynchronous FIFO Design with Asynchronous Pointer Comparis
Simulation and Synthesis Techniques for Asynchronous FIFO Design with Asynchronous Pointer Comparisons
2017-07-19
109
thie document give the three different design for generating a random number
thie document give the three different design for generating a random number
2013-11-28
125
This book used in HDL language, the name is Advanced FPGA Design.
This book used in HDL language, the name is Advanced FPGA Design.
2014-01-31
56
Title : Implementation of quadrature modulation and demodulation Design Object : By implementing qu
Title : Implementation of quadrature modulation and demodulation Design Object : By implementing quadrature modulation ...
2013-12-09
159
systemverilog+数字系统设计 Digital System Design with SystemVerilog
国外system verilog的教材，从最基础的数字电路讲起，覆盖system verilog的各个方面
2022-07-25
12