为了在CDMA系统中更好地应用QDPSK数字调制方式，在分析四相相对移相（QDPSK)信号调制解调原理的基础上，设计了一种QDPSK调制解调电路，它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上，进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中，测试结果表明，调制电路能正确选相，解调电路输出数据与QDPSK调制输入数据完全一致，达到了预期的设计要求。 Abstract: In order to realize the better application of digital modulation mode QDPSK in the CDMA system， a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test RESULT shows that the modulation circuit can exactly choose the phase，and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.
上传时间： 2013-10-27
上传用户：jyycc
The revolution of automation on factory floors is a key driver for the seemingly insatiable demand for higher productivity， lower total cost of ownership，and high safety. As a RESULT， industrial applications drive an insatiable demand of higher data bandwidth and higher system-level performance. This white paper describes the trends and challenges seen by designers and how FPGAs enable solutions to meet their stringent design goals.
上传时间： 2013-11-08
上传用户：yan2267246
基于通用集成运算放大器，利用MASON公式设计了一个多功能二阶通用滤波器，能同时或分别实现低通、高通和带通滤波，也能设计成一个正交振荡器。电路的极点频率和品质因数能够独立、精确地调节。电路使用4个集成运放、2个电容和11个电阻，所有集成运放的反相端虚地。利用计算机仿真电路的通用滤波功能、极点频率和品质因数的独立控制和正交正弦振荡，从而证明该滤波器正确有效。 Abstract: A new multifunctional second-order filter based on OPs was presented by MASON formula. Functions， such as high-pass， band-pass， low-pass filtering， can be realized respectively and simultaneously， and can become a quadrature oscillator by modifying resistance ratio. Its pole angular frequency and quality factor can be tuned accurately and independently. The circuit presented contains four OPs， two capacitors， and eleven resistances， and inverting input of all OPs is virtual ground. Its general filtering， the independent control of pole frequency and quality factor and quadrature sinusoidal oscillation were simulated by computer， and the RESULT shows that the presented circuit is valid and effective.
上传时间： 2013-10-09
上传用户：13788529953
编程查找指定目录下所有EXE文件，并将其全路径存入RESULT.txt中，要求用递归
上传时间： 2014-01-11
上传用户：1051290259
A Waiter relays an order Object to a Producer, waits in an independent thread during the production, and then delivers the RESULT using a Consumer callback method.
标签： independent production Producer Waiter
上传时间： 2015-02-10
上传用户：lepoke
首先，打开图像（256色）；再次，进行归一化处理，点击“一次性处理”；最后，点击“R”或者使用菜单找到相应项来进行识别。识别的结果显示在屏幕上，同时也输出到文件RESULT.txt中。
标签：
上传时间： 2013-12-22
上传用户：851197153
This example program shows how to configure and use the A/D Converter of the following microcontroller: STMicroelectronics ST10F166 After configuring the A/D, the program reads the A/D RESULT and outputs the converted value using the serial port. To run this program... Build the project (Project Menu, Build Target) Start the debugger (Debug Menu, Start/Stop Debug Session) View the Serial Window (View Menu, Serial Window #1) View the A/D converter peripheral (Peripheral Menu, A/D Converter) Run the program (Debug Menu, Go) A debug script (debug.ini) creates buttons that set different analog values in A/D channels. As the program runs, you will see the A/D input and output change. Other buttons create signals that generate sine wave or sawtooth patterns as analog inputs. µ Vision3 users may enable the built-in Logic Analyzer to view, measure and compare these input signals graphically.
标签： microcontroll Converter configure following
上传时间： 2014-11-30
上传用户：独孤求源
VHDL 关于2DFFT设计程序 u scinode1 ∼ scinode9.vhd: Every SCI node RTL vhdl code. The details can be seen in the following section. u 2dfft.vhd: The top module includes these scinodes and form a 3x3 SCI Torus network, and it support these sub-modules scinode1∼ scinode9 reset and clk and global_cnt signals to synchronous the sub-modules to simplify the overall design. u proj2.wfc: VSS simulation RESULT that is the same as the ModelSim simulation RESULT. u Pro2_2.wfc: VSS simulation RESULT of another test pattern can’t cause overflow situation.
标签： scinode1 scinode details 2DFFT
上传时间： 2014-12-02
上传用户：15071087253
AVL Tree implementation: I also included a test function to compare the AVL Tree performance with STL Set and Map. Compile the source mavltree.cpp and run it to see the RESULT!
标签： Tree implementation performance AVL
上传时间： 2013-12-19
上传用户：3到15
A method is presented for augmenting an extended Kalman filter with an adaptive element. The RESULTing estimator provides robustness to parameter uncertainty and unmodeled dynamics.
标签： augmenting presented adaptive extended
上传时间： 2014-01-05
上传用户：qq1604324866
