源码文件
COMPILER_SETTINGS { DRC_FANOUT_EXCEEDING = 30; DRC_REPORT_FANOUT_EXCEEDING = OFF; DRC_TOP_FANOUT = 50; DRC_REPORT_TOP_FAN…
Passive+Components 源代码
汇集 Passive+Components 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
收录资源 500 份
全站深度检索
共匹配 500 份工程资源
· 第 29 / 50 页
源码文件
COMPILER_SETTINGS { DRC_FANOUT_EXCEEDING = 30; DRC_REPORT_FANOUT_EXCEEDING = OFF; DRC_TOP_FANOUT = 50; DRC_REPORT_TOP_FAN…
源码文件
PROTEL NETLIST 2.0 [ DESIGNATOR C1 FOOTPRINT 0603 PARTTYPE 0.1uF DESCRIPTION Part Field 1 * Part Field 2 * Part Fie…
源码文件
DEFAULT_DEVICE_OPTIONS { GENERATE_CONFIG_HEXOUT_FILE = OFF; GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON; GENERATE_CONFIG_JBC_FILE …
源码文件
ISIS SCHEMATIC DESCRIPTION FORMAT 6.1 ===================================== Design: F:\Win\myfile\ARM\proteus\基于PROTEUS的ARM虚拟开…
源码文件
PROTEL NETLIST 2.0 [ DESIGNATOR C100 FOOTPRINT 0603 PARTTYPE 0.1uF DESCRIPTION Part Field 1 * Part Field 2 * Part F…
源码文件
ISIS SCHEMATIC DESCRIPTION FORMAT 6.1 ===================================== Design: E:\EDA_单片机\单片机C教程\单片机程序\信号发生器\信号发生器.DSN D…
源码文件
/* Code snarfed from the GNU Hurd's `settrans.c' in order to test libargp. */ #include "argp.h" #define DEFAULT_TIMEOUT 60 #def…
源码文件
ISIS SCHEMATIC DESCRIPTION FORMAT 6.1 ===================================== Design: D:\My Documents\my design\自本0401 36 徐治根\pr…
源码文件
DEFAULT_DEVICE_OPTIONS { GENERATE_CONFIG_HEXOUT_FILE = OFF; GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON; GENERATE_CONFIG_JBC_FILE …