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电源技术  Lakewood (MAXREFDES7#)3.3V Input, ±12V (±15V) Output Isolated Power Supply

Abstract: This document details the Lakewood (MAXREFDES7#) subsystem reference design, a 3.3V input, &plusmn;12V (&plusmn;15V) output, isolated power supply. The Lakewood reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and two wide input range and adjus ...

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电源技术  Riverside (MAXREFDES8#)3.3V Input, 12V (15V) Output Isolated Power Supply

Abstract: This document details the Riverside (MAXREFDES8#) subsystem reference design, a 3.3V input, 12V (15V) output, isolated power supply. The Riverside reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and one wide input range and adjustable output ...

https://www.eeworm.com/dl/505/23299.html

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*行业应用  <B>Award BIOS(Basic Input/Output System)(电脑启动时所必需)的源码</B>

Award BIOS(Basic Input/Output System)(电脑启动时所必需)的源码

https://www.eeworm.com/dl/631/101004.html

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VHDL/FPGA/Verilog 设计一个四路数据选择器,其功能是将四组不同的数据按要求选择一个输出.输出的那组数据有两个控制信号决定,其真值表如下: 数据选择控制端输出的数据 Input0 Input1 output 0 0 o

设计一个四路数据选择器,其功能是将四组不同的数据按要求选择一个输出.输出的那组数据有两个控制信号决定,其真值表如下: 数据选择控制端输出的数据 Input0 Input1 output 0 0 output0 0 1 output1 1 0 output 2 1 1 output 3

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编译器/解释器  Complete support for EBNF notation; Object-oriented parser design; C++ output; Deterministic bottom-

Complete support for EBNF notation; Object-oriented parser design; C++ output; Deterministic bottom-up "shift-reduce" parsing; SLR(1), LALR(1) and LR(1) table construction methods; Automatic parse tree creation; Possibility to output parse tree in XML format; Verbose conflict diagnostics; Generation ...

https://www.eeworm.com/dl/628/103267.html

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