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Negative

  • 这个是人工免疫系统中的反向选择算法(Negative Selection Aglorithm)的编程实例,它主要用于异常检测方面。请多指教!

    这个是人工免疫系统中的反向选择算法(Negative Selection Aglorithm)的编程实例,它主要用于异常检测方面。请多指教!

    标签: Aglorithm Selection Negative 人工免疫

    上传时间: 2015-06-07

    上传用户:hoperingcong

  • flash serial input queue. returns 0 on success or Negative error * number otherwise

    flash serial input queue. returns 0 on success or Negative error * number otherwise

    标签: otherwise Negative returns success

    上传时间: 2015-11-13

    上传用户:yxgi5

  • Code to run the Non-Negative Matrix Factorization algorithm as presented in the Lee, Seung 1999 Natu

    Code to run the Non-Negative Matrix Factorization algorithm as presented in the Lee, Seung 1999 Nature paper.

    标签: Factorization Non-Negative algorithm presented

    上传时间: 2016-01-19

    上传用户:litianchu

  • 中南赛区ACM竞赛题 Description Given a two-dimensional array of positive and Negative integers, a sub-rec

    中南赛区ACM竞赛题 Description Given a two-dimensional array of positive and Negative integers, a sub-rectangle is any contiguous sub-array of size 1*1 or greater located within the whole array. The sum of a rectangle is the sum of all the elements in that rectangle. In this problem the sub-rectangle with the largest sum is referred to as the maximal sub-rectangle.

    标签: two-dimensional Description Negative integers

    上传时间: 2013-12-22

    上传用户:lijianyu172

  • Negative principal refractive indices and accidental isotropy in two-dimensional photonic crystals

    Negative principal refractive indices and accidental isotropy in two-dimensional photonic crystals with an asymmetrical unit ce

    标签: two-dimensional accidental refractive principal

    上传时间: 2016-07-04

    上传用户:kristycreasy

  • Compute the Electric_Field of the single interface contains the single Negative materials

    Compute the Electric_Field of the single interface contains the single Negative materials

    标签: single the Electric_Field interface

    上传时间: 2016-11-30

    上传用户:缥缈

  • 74LS73.pdf

    英文描述: Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs 中文描述: 双下降沿触发主从JK触发器明确和互补输出

    标签: 74 73 LS

    上传时间: 2013-04-24

    上传用户:黄华强

  • 应用笔记-校准激光驱动器POT和DAC

    Abstract: A laser module designer can use a fixed resistor, mechanical pot, digital pot, or a digital-to-analogconverter (DAC) to control the laser driver's modulation and bias currents. The advantages of a programmablemethod (POT or DAC) are that the manufacturing process can be automated and digital control can be applied(e.g., to compensate for temperature). Using POTs can be a more simple approach than a DAC. There can be aslight cost advantage to using a POT, but this is usually not significant relative to other pieces of the design.Using a DAC can offer advantages, including improved linearity (translating to ease of software implementationand ability to hit the required accuracy), increased board density, a wider range of resolutions, a betteroptimization range, ease of use with a Negative voltage laser driver, and unit-to-unit consistency

    标签: POT DAC 应用笔记 校准

    上传时间: 2013-11-13

    上传用户:ca05991270

  • ADC转换器技术用语 (A/D Converter Defi

    ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the Negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.

    标签: Converter Defi ADC 转换器

    上传时间: 2013-11-12

    上传用户:pans0ul

  • pcb layout design(台湾硬件工程师15年经验

    PCB LAYOUT 術語解釋(TERMS)1. COMPONENT SIDE(零件面、正面)︰大多數零件放置之面。2. SOLDER SIDE(焊錫面、反面)。3. SOLDER MASK(止焊膜面)︰通常指Solder Mask Open 之意。4. TOP PAD︰在零件面上所設計之零件腳PAD,不管是否鑽孔、電鍍。5. BOTTOM PAD:在銲錫面上所設計之零件腳PAD,不管是否鑽孔、電鍍。6. POSITIVE LAYER:單、雙層板之各層線路;多層板之上、下兩層線路及內層走線皆屬之。7. Negative LAYER:通常指多層板之電源層。8. INNER PAD:多層板之POSITIVE LAYER 內層PAD。9. ANTI-PAD:多層板之Negative LAYER 上所使用之絕緣範圍,不與零件腳相接。10. THERMAL PAD:多層板內Negative LAYER 上必須零件腳時所使用之PAD,一般稱為散熱孔或導通孔。11. PAD (銲墊):除了SMD PAD 外,其他PAD 之TOP PAD、BOTTOM PAD 及INNER PAD 之形狀大小皆應相同。12. Moat : 不同信號的 Power& GND plane 之間的分隔線13. Grid : 佈線時的走線格點2. Test Point : ATE 測試點供工廠ICT 測試治具使用ICT 測試點 LAYOUT 注意事項:PCB 的每條TRACE 都要有一個作為測試用之TEST PAD(測試點),其原則如下:1. 一般測試點大小均為30-35mil,元件分布較密時,測試點最小可至30mil.測試點與元件PAD 的距離最小為40mil。2. 測試點與測試點間的間距最小為50-75mil,一般使用75mil。密度高時可使用50mil,3. 測試點必須均勻分佈於PCB 上,避免測試時造成板面受力不均。4. 多層板必須透過貫穿孔(VIA)將測試點留於錫爐著錫面上(Solder Side)。5. 測試點必需放至於Bottom Layer6. 輸出test point report(.asc 檔案powerpcb v3.5)供廠商分析可測率7. 測試點設置處:Setup􀃆pads􀃆stacks

    标签: layout design pcb 硬件工程师

    上传时间: 2013-10-22

    上传用户:pei5