echo #----------------------------------------------------------------------- echo # Altera MaxplusII Verilog compiler script fo…
MaxPlus+II 源代码
汇集 MaxPlus+II 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
echo #----------------------------------------------------------------------- echo # Altera MaxplusII VHDL compiler script for t…
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3} { "Info" "…
echo #----------------------------------------------------------------------- echo # Altera MaxplusII Verilog compiler script fo…
echo #----------------------------------------------------------------------- echo # Altera MaxplusII VHDL compiler script for t…
Project Informationd:\maxplus2\maxplus2\workplace\vhdl\vhdl0\clock1\counter60.rpt MAX+plus II Compiler Report File Version 10.…
Project Information d:\maxplus2\maxplus2\workplace\vhdl\vhdl0\clock1\bcd7.rpt MAX+plus II Compiler Report File Version 10.12 …
Project Informationd:\maxplus2\maxplus2\workplace\vhdl\vhdl0\clock1\counter24.rpt MAX+plus II Compiler Report File Version 10.…
echo #----------------------------------------------------------------------- echo # Altera MaxplusII Verilog compiler script fo…
echo #----------------------------------------------------------------------- echo # Altera MaxplusII Verilog compiler script fo…