源码文件
#mach: crisv32 #sim(crisv32): --hw-device "/rv/dummy 0x12" # A variant of trivial2.ms to check that the right thing happens when …
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源码文件
#mach: crisv10 crisv32 #sim(crisv10): --hw-device "/rv/trace? true" #sim(crisv32): --hw-device "/rv/trace? true" #output: /rv: WD\…
源码文件
#mach: crisv10 crisv32 #sim(crisv10): --hw-device "/rv/trace? true" --hw-device "/cris/multiple-int 0xae" #sim(crisv32): --hw-devi…
源码文件
#mach: crisv10 crisv32 #sim(crisv10): --hw-device "/rv/trace? true" --hw-device "/rv/watchdog-interval 1" #sim(crisv32): --hw-devi…
源码文件
# mach: crisv10 # output: 1122330a\nbb113344\naa557711\n # Test v10-specific special registers. FIXME: ccr, irp, bar, brp, usp. …
源码文件
#mach: crisv10 #output: Basic clock cycles, total @: 31\n #output: Memory source stall cycles: 0\n #output: Memory read-after-writ…
源码文件
# mach: crisv32 # output: ffffff20\nbb113344\n # Test v32-specific special registers. FIXME: more registers. .include "testuti…
源码文件
# mach: crisv32 # ld: --section-start=.text=0 # xerror: # output: b1e\n # output: core: 4 byte write to unmapped address 0x9000000…
源码文件
# mach: crisv32 .include "testutils.inc" ; Check for various non-arithmetic insns that C and V are not affected ; on v32 (where…
源码文件
# mach: crisv32 # output: fffffffe\n # output: ffffffff\n # output: fffffffe\n # output: 1\n # output: fffffffe\n # output: ffffff…