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找到约 12 项符合 Latency 的查询结果

行业发展研究 This paper presents several low-latency mixed-timing FIFO (first-in–first-out) interfaces designs t

This paper presents several low-latency mixed-timing FIFO (first-in–first-out) interfaces designs that interface systems on a chip working at different speeds. The connected systems can be either synchronous or asynchronous. The designs are then adapted to work between systems with very long interc ...
https://www.eeworm.com/dl/692/206744.html
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并行计算 编程测试并行平台MPI层的带宽和延迟: 单向通信时间简单表示为:t=Latency+Message_Size/Bandwidth 利用该方程得到系统的带宽和延迟

编程测试并行平台MPI层的带宽和延迟: 单向通信时间简单表示为:t=Latency+Message_Size/Bandwidth 利用该方程得到系统的带宽和延迟
https://www.eeworm.com/dl/694/335876.html
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其他书籍 This is a paper titled 1- Minimizing Broadcast Latency in Ad Hoc Wireless Network (p533-banik)

This is a paper titled 1- Minimizing Broadcast Latency in Ad Hoc Wireless Network (p533-banik)
https://www.eeworm.com/dl/542/455280.html
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模拟电子 ADC转换器技术用语 (A/D Converter Defi

ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relati ...
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教程资料 Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)

  中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
https://www.eeworm.com/dl/fpga/doc/32075.html
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可编程逻辑 Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)

  中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
https://www.eeworm.com/dl/kbcluoji/38746.html
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可编程逻辑 XAPP708 -133MHz PCI-X到128MB DDR小型DIMM存储器桥

  The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Spec ...
https://www.eeworm.com/dl/kbcluoji/40099.html
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其他 Easy-to-Use, Ultra-Tiny, Differential, 16-Bit Delta Sigma ADC With I2C Interface The LTC2453 is an

Easy-to-Use, Ultra-Tiny, Differential, 16-Bit Delta Sigma ADC With I2C Interface The LTC2453 is an ultra-tiny, fully differential, 16-bit, analog-to-digital converter. The LTC2453 uses a single 2.7V to 5.5V supply and communicates through an I2C interface. The ADC is available in an 8-pin, 3mm x 2m ...
https://www.eeworm.com/dl/534/255158.html
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单片机开发 Wireless range extenders or wireless repeaters can extend the range of an existing wireless network.

Wireless range extenders or wireless repeaters can extend the range of an existing wireless network. Range extenders can be strategically placed to elongate a signal area or allow for the signal area to reach around barriers such as those created in L-shaped corridors. Wireless devices connected thr ...
https://www.eeworm.com/dl/648/471451.html
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论文 5G+Edge+Cloud+Networks

The surge of mobile data traffic forces network operators to cope with capacity shortage. The deployment of small cells in 5G networks is meant to reduce latency, backhaul traffic and increase radio access capacity. In this context, mobile edge computing technology will be used to manage dedicated c ...
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