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GREEN

  • 俄罗斯方块代码

    RGB,三原色光模式(英语:RGB color model),又称RGB颜色模型或红绿蓝颜色模型,是一种加色模型,将红(Red)、绿(GREEN)、蓝(Blue)三原色的色光以不同的比例相加,以产生多种多样的色光。RGB颜色模型的主要目的是在电子系统中检测。

    标签:

    上传时间: 2015-06-14

    上传用户:lxy123

  • 俄罗斯方块

    RGB,三原色光模式(英语:RGB color model),又称RGB颜色模型或红绿蓝颜色模型,是一种加色模型,将红(Red)、绿(GREEN)、蓝(Blue)三原色的色光以不同的比例相加,以产生多种多样的色光。RGB颜色模型的主要目的是在电子系统中检测

    标签:

    上传时间: 2015-06-14

    上传用户:lxy123

  • AO4420

    AO4420, AO4420L ( GREEN Product ) N-Channel Enhancement Mode Field Effect Transistor

    标签: 4420 AO

    上传时间: 2020-04-19

    上传用户:su1254

  • GREEN Radio Communication Networks

    Currently, the information and communications technology (ICT) industry sector accounts for about 2–6% of the energy consumption worldwide, and a significant por- tion of this is contributed by the wireless and mobile communications industry. With the proliferation of wireless data applications, wireless technology continues to increase worldwide at an unprecedented growth rate. This has resulted in an increased number of installed base stations and higher demand on power grids and device power usage, causing an increased carbon footprint worldwide.

    标签: Communication Networks GREEN Radio

    上传时间: 2020-05-27

    上传用户:shancjb

  • GREEN_Heterogeneous_Wireless_Networks

    Thisbookfocusesontheemergingresearchtopic‘GREEN(energy-efficient)wirelessnetworks’ that has drawn huge attention recently from both academia and industry. This topic is highly motivated due to important environmental, financial and quality-of-experience (QoE) consid- erations.Duetosuchconcerns,varioussolutionshavebeenproposedtoenableefficientenergy usage in wireless networks, and these approaches are referred to as GREEN wireless communi- cations and networking. The term ‘GREEN’ emphasizes the environmental dimension of the proposed solutions. Hence, it is not sufficient to present a cost-effective solution unless it is eco-friendly.

    标签: GREEN_Heterogeneous_Wireless_Netw orks

    上传时间: 2020-05-27

    上传用户:shancjb

  • GSM+Networks

    Someone who wants to get to know the customs of a country frequently receives the advice to learn the language of that country. Why? Because the dif- ferences that distinguish the people of one country from those of another are reflected in the language. For example, the people of the islands of the Pacific do not have a term for war in their language. Similarly, some native tribes in the rain forests of the Amazon use up to 100 different terms for the color GREEN.

    标签: Networks GSM

    上传时间: 2020-05-27

    上传用户:shancjb

  • Visible Light Communication

    Visible light communications (VLC) is the name given to an optical wireless communication system that carries information by modulating light in the visible spectrum (400–700 nm) that is principally used for illumination [1–3]. The communications signal is encoded on top of the illumination light. Interest in VLC has grown rapidly with the growth of high power light emitting diodes (LEDs) in the visible spectrum. The motivation to use the illumination light for communication is to save energy by exploiting the illumination to carry information and, at the same time, to use technology that is “GREEN” in comparison to radio frequency (RF) technology, while using the existing infrastructure of the lighting system. 

    标签: Communication Visible Light

    上传时间: 2020-06-01

    上传用户:shancjb

  • Parallel Power Electronics Filters

    Power Electronics is one of modern and key technologies in Electrical and Electronics Engineering for GREEN power, sustainable energy systems, and smart grids. Especially, the transformation of existing electric power systems into smart grids is currently a global trend. The gradual increase of distributed generators in smart grids indicates a wide and important role for power electronic converters in the electric power system, also with the increased use of power electronics devices (nonlinear loads) and motor loadings, low cost, low-loss and high-performance shunt current quality compensators are highly demanded by power customers to solve current quality problems caused by those loadings.

    标签: Electronics Parallel Filters Power

    上传时间: 2020-06-07

    上传用户:shancjb

  • FPGA采样AD9238数据并通过VGA波形显示例程 Verilog逻辑源码Quartus工程文件+

    FPGA采样AD9238数据并通过VGA波形显示例程 Verilog逻辑源码Quartus工程文件+文档说明,FPGA型号Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。ADC 模块型号为 AN9238,最大采样率 65Mhz,精度为12 位。实验中把 AN9238 的 2 路输入以波形方式在 HDMI 上显示出来,我们可以用更加直观的方式观察波形,是一个数字示波器雏形。module top( input                       clk, input                       rst_n, output                      ad9238_clk_ch0, output                      ad9238_clk_ch1, input[11:0]                 ad9238_data_ch0, input[11:0]                 ad9238_data_ch1, //vga output output                      vga_out_hs, //vga horizontal synchronization output                      vga_out_vs, //vga vertical synchronization output[4:0]                 vga_out_r,  //vga red output[5:0]                 vga_out_g,  //vga GREEN output[4:0]                 vga_out_b   //vga blue);wire                            video_clk;wire                            video_hs;wire                            video_vs;wire                            video_de;wire[7:0]                       video_r;wire[7:0]                       video_g;wire[7:0]                       video_b;wire                            grid_hs;wire                            grid_vs;wire                            grid_de;wire[7:0]                       grid_r;wire[7:0]                       grid_g;wire[7:0]                       grid_b;wire                            wave0_hs;wire                            wave0_vs;wire                            wave0_de;wire[7:0]                       wave0_r;wire[7:0]                       wave0_g;wire[7:0]                       wave0_b;wire                            wave1_hs;wire                            wave1_vs;wire                            wave1_de;wire[7:0]                       wave1_r;wire[7:0]                       wave1_g;wire[7:0]                       wave1_b;wire                            adc_clk;wire                            adc0_buf_wr;wire[10:0]                      adc0_buf_addr;wire[7:0]                       adc0_bu

    标签: fpga ad9238

    上传时间: 2021-10-27

    上传用户:qingfengchizhu

  • FPGA读写SD卡读取BMP图片通过LCD显示例程实验 Verilog逻辑源码Quartus工程文件

    FPGA读写SD卡读取BMP图片通过LCD显示例程实验 Verilog逻辑源码Quartus工程文件+文档说明,FPGA型号Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。1 实验简介在前面的实验中我们练习了 SD 卡读写,VGA 视频显示等例程,本实验将 SD 卡里的 BMP 图片读出,写入到外部存储器,再通过 VGA、LCD 等显示。本实验如果通过液晶屏显示,需要有液晶屏模块。2 实验原理在前面的实验中我们在 VGA、LCD 上显示的是彩条,是 FPGA 内部产生的数据,本实验将彩条替换为 SD 内的 BMP 图片数据,但是 SD 卡读取速度远远不能满足显示速度的要求,只能先写入外部高速 RAM,再读出后给视频时序模块显示module top( input                       clk, input                       rst_n, input                       key1, output [5:0]                seg_sel, output [7:0]                seg_data, output                      vga_out_hs,        //vga horizontal synchronization output                      vga_out_vs,        //vga vertical synchronization output[4:0]                 vga_out_r,         //vga red output[5:0]                 vga_out_g,         //vga GREEN output[4:0]                 vga_out_b,         //vga blue output                      sd_ncs,            //SD card chip select (SPI mode) output                      sd_dclk,           //SD card clock output                      sd_mosi,           //SD card controller data output input                       sd_miso,           //SD card controller data input output                      sdram_clk,         //sdram clock output                      sdram_cke,         //sdram clock enable output                      sdram_cs_n,        //sdram chip select output                      sdram_we_n,        //sdram write enable output                      sdram_cas_n,       //sdram column address strobe output                      sdram_ras_n,       //sdram row address strobe output[1:0]                 sdram_dqm,         //sdram data enable output[1:0]                 sdram_ba,          //sdram bank address output[12:0]                sdram_addr,        //sdram address inout[15:0]                 sdram_dq           //sdram data);parameter MEM_DATA_BITS         = 16  ;            //external memory user interface data widthparameter ADDR_BITS             = 24  

    标签: fpga

    上传时间: 2021-10-27

    上传用户: