源码文件
CHAPT06\CHAPT06.CPP 16-Bit test program for the BiosPort class CHAPT06\CHAPT06.EXE 16-Bit executable of the test program CHAPT06\C…
Design+For+Test 技术资料
汇集 Design+For+Test 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
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PDF文档
Implementation of Edmonds Karp algorithm that calculates maxFlow of graph. Input: For each test case, the first line contains the …
压缩工程
C# Unit Test Guide C# Unit Test Guide
技术文档
ACE Programmer s Guide, The: Practical Design Patterns for Network and Systems Programming
压缩工程
-- PCI Target Interface Design for XC73144 -- -- Synopsys VHDL Solution using Xilinx XC7000 Library
电路图纸
Complete support for EBNF notation; Object-oriented parser design; C++ output; Deterministic bottom-
Complete support for EBNF notation; Object-oriented parser design; C++ output; Deterministic bottom-up "shift-reduce" parsing; SLR…
电路图纸
Jtag schematic for embemed system design. It support parallel port connected to jtag.
压缩工程
compact pci footprint for design,using pads2005 open it ,like you need it !
源码文件
this the AVR lib who used to design the project for AVR chips
技术文档
wsd:enc28j60 28 pins for ethernet design,10Mbps,enc28j60+avr chip m16 webserver source.