源码文件
/********************************************************************* * * Compiler specific defs. * ****…
Compiler+Technology 源代码
汇集 Compiler+Technology 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
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源码文件
D:/MyWork/My_FIFO_Asy/FIFO_Syn/t_FIFO_Buffer.v {1 {vlog -work work D:/MyWork/My_FIFO_Asy/FIFO_Syn/t_FIFO_Buffer.v Model Technolog…
源码文件
D:/MyWork/My_FIFO_Asy/FIFO_Syn/t_FIFO_Buffer.v {1 {vlog -work work D:/MyWork/My_FIFO_Asy/FIFO_Syn/t_FIFO_Buffer.v Model Technolog…
源码文件
D:/altera/lvds/tx.v {1 {vlog -work work D:/altera/lvds/tx.v Model Technology ModelSim SE vlog 6.0 Compiler 2004.08 Aug 19 2004 -…
源码文件
# Reading e:/modelsim/tcl/vsim/pref.tcl # do pn_encode_pn_code_test_v_tf.fdo # ** Warning: (vlib-34) Library already exists at…
源码文件
K:/IC/16bitCPU/MYCPU2.0/mux2.v {1 {vlog -work work K:/IC/16bitCPU/MYCPU2.0/mux2.v Model Technology ModelSim SE vlog 6.0 Compiler …
源码文件
E:/Test/clkgen/clk_div.v {1 {vlog -work work E:/Test/clkgen/clk_div.v Model Technology ModelSim SE vlog 5.8b Compiler 2004.01 Jan…
源码文件
E:/modelsim/examples/fdivision_tb.v {1 {vlog -work work -novopt E:/modelsim/examples/fdivision_tb.v Model Technology ModelSim SE …
源码文件
D:/Program/Modeltech_5.7d/examples/test/cpu_register.v {1 {vlog -work work D:/Program/Modeltech_5.7d/examples/test/cpu_register.v …
源码文件
D:/Verilog/ise_test/params.v {1 {vlog -work work -novopt D:/Verilog/ise_test/params.v Model Technology ModelSim SE vlog 6.1f Comp…