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CX-ONE

  • DS18B20中文资料

    FEATURES  Unique 1-Wire interface requires only one port pin for communication  Multidrop capability simplifies distributed temperature sensing applications  Requires no external components  Can be powered from data line. Power supply range is 3.0V to 5.5V  Zero standby power required  Measures temperatures from -55°C to +125°C. Fahrenheit equivalent is -67°F to +257°F  ±0.5°C accuracy from -10°C to +85°C  Thermometer resolution is programmable from 9 to 12 bits  Converts 12-bit temperature to digital word in 750 ms (max.)  User-definable, nonvolatile temperature alarm settings  Alarm search command identifies and addresses devices whose temperature is outside of programmed limits (temperature alarm condition)  Applications include thermostatic controls, industrial systems, consumer products, thermometers, or any thermally sensitive system

    标签: 18B B20 DS 18

    上传时间: 2013-08-04

    上传用户:CHENKAI

  • 【经典的天线书籍】Practical Antenna Handbook

    ·基本信息Practical Antenna Handbook, 4th EditionbyJoseph J.Carr作者 Jeseph J. Carr 美国国防部航空电子(avionics)资深工程师one of the worlds leading and prolific writer and working scientist on electronics and radio, and an

    标签: nbsp Practical Handbook Antenna

    上传时间: 2013-04-24

    上传用户:yare

  • FPGA64的VHDL源代码

    VHDL source codes of the FPGA64, a fpga implementation of the C64 computer. Version for the c-one fpga board.

    标签: FPGA VHDL 64 源代码

    上传时间: 2013-08-05

    上传用户:wwwe

  • VHDL,Verilog,System verilog比较

      本文简单讨论并总结了VHDL、Verilog,System verilog 这三中语言的各自特点和区别As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.

    标签: Verilog verilog System VHDL

    上传时间: 2013-10-16

    上传用户:牛布牛

  • Verilog编码中的非阻塞性赋值

      One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assignments should be used. This paper details how Verilog blocking andnonblocking assignments are scheduled, gives important coding guidelines to infer correctsynthesizable logic and details coding styles to avoid Verilog simulation race conditions

    标签: Verilog 编码 非阻塞性赋值

    上传时间: 2013-10-17

    上传用户:tb_6877751

  • 模拟IC性能的权衡 模拟到数字化设计的挑战

    Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). However,there are challenges when you integrate more analog onto a digital design. As with all things in life, inelectronics we must always trade one parameter for another, with the application dictating the propertrade-off of analog function. In this application note, we examine how the demand for economy of spaceand cost pushes analog circuits onto digital substrates, and what design challenges emerge.  

    标签: 模拟IC 性能 模拟 数字化设计

    上传时间: 2013-11-17

    上传用户:菁菁聆听

  • MAX17600数据资料

     The MAX17600–MAX17605 devices are high-speedMOSFET drivers capable of sinking /sourcing 4A peakcurrents. The devices have various inverting and noninvertingpart options that provide greater flexibility incontrolling the MOSFET. The devices have internal logiccircuitry that prevents shoot-through during output-statchanges. The logic inputs are protected against voltagespikes up to +14V, regardless of VDD voltage. Propagationdelay time is minimized and matched between the dualchannels. The devices have very fast switching time,combined with short propagation delays (12ns typ),making them ideal for high-frequency circuits. Thedevices operate from a +4V to +14V single powersupply and typically consume 1mA of supply current.The MAX17600/MAX17601 have standard TTLinput logic levels, while the MAX17603 /MAX17604/MAX17605 have CMOS-like high-noise margin (HNM)input logic levels. The MAX17600/MAX17603 are dualinverting input drivers, the MAX17601/MAX17604 aredual noninverting input drivers, and the MAX17602 /MAX17605 devices have one noninverting and oneinverting input. These devices are provided with enablepins (ENA, ENB) for better control of driver operation.

    标签: 17600 MAX 数据资料

    上传时间: 2013-12-20

    上传用户:zhangxin

  • 消除电源旁路滤波噪声

    Abstract: If sensitive analog systems are run from one supply without the sufficient bypassing to eliminate noise,

    标签: 电源旁路 滤波噪声

    上传时间: 2013-11-23

    上传用户:qiulin1010

  • 基准电压的温度漂移研究应用笔记

    Abstract: A perfect voltage reference produces a stable voltage independent of any external factors. Real-world voltagereferences, of course, are subject to errors caused by many external factors. One causeof these major errors istemperature. Without care, it is easy to operate a voltage reference outside its operating temperature range. Thisapplication note describes how references respond to temperature changes, and how self-heating can cause a voltagereference to operate outside its recommended temperature range. Once understood, this knowledge can then be used toavoid making this design error.

    标签: 基准电压 温度漂移 应用笔记

    上传时间: 2013-11-08

    上传用户:xianglee

  • RF至数字接收器的信号链噪声分析

      Designers of signal receiver systems often need to performcascaded chain analysis of system performancefrom the antenna all the way to the ADC. Noise is a criticalparameter in the chain analysis because it limits theoverall sensitivity of the receiver. An application’s noiserequirement has a signifi cant infl uence on the systemtopology, since the choice of topology strives to optimizethe overall signal-to-noise ratio, dynamic range andseveral other parameters. One problem in noise calculationsis translating between the various units used by thecomponents in the chain: namely the RF, IF/baseband,and digital (ADC) sections of the circuit.

    标签: 数字接收器 信号链 噪声分析

    上传时间: 2014-12-05

    上传用户:cylnpy