The PCA9541 is a 2-to-1 I2C-BUS master selector designed for high reliability dual masterI2C-BUS applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-BUSes that connect to the same downstreamI2C-BUS slave devices. I2C-BUS commands are sent by either I2C-BUS master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-BUS.
上传时间： 2013-10-09
上传用户：3294322651
The PCA9542A is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-BUS.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register. Two interrupt inputs, INT0 and INT1, one for each of theSCx/SDx downstream pairs, are provided. One interrupt output, INT, which acts as anAND of the two interrupt inputs, is provided.
上传时间： 2013-12-07
上传用户：europa_lin
The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-BUS. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-BUS, determined by the contents of the programmable Controlregister. When the I2C-BUS bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-BUS bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-BUS is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-BUSstate machine and causes all the bits to be open, as does the internal power-on resetfunction.
上传时间： 2014-11-22
上传用户：xcy122677
The PCA9546A is a quad bidirectional translating switch controlled via the I2C-BUS. TheSCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.
上传时间： 2013-11-16
上传用户：cc1915
The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-BUS/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-BUS I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-BUSaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application Note AN469.
上传时间： 2013-11-13
上传用户：fredguo
The PCA9547 is an octal bidirectional translating multiplexer controlled by the I2C-BUS.The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Only oneSCx/SDx channel can be selected at a time, determined by the contents of theprogrammable control register. The device powers up with Channel 0 connected, allowingimmediate communication between the master and downstream devices on that channel.
上传时间： 2014-12-28
上传用户：270189020
The PCA9548A is an octal bidirectional translating switch controlled via the I2C-BUS. TheSCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.An active LOW reset input allows the PCA9548A to recover from a situation where one ofthe downstream I2C-BUSes is stuck in a LOW state. Pulling the RESET pin LOW resets theI2C-BUS state machine and causes all the channels to be deselected as does the internalPower-on reset function.
上传时间： 2013-10-13
上传用户：bakdesec
The PCA9557 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus and I2C-BUS applications. The PCA9557 consists of an 8-bit input port register, 8-bit output port register, and an I2C-BUS/SMBus interface. It has low current consumption and a high-impedance open-drain output pin, IO0. The system master can enable the PCA9557’s I/O as either input or output by writing to the configuration register. The system master can also invert the PCA9557 inputs by writing to the active HIGH polarity inversion register. Finally, the system master can reset the PCA9557 in the event of a time-out by asserting a LOW in the reset input. The power-on reset puts the registers in their default state and initializes the I2C-BUS/SMBus state machine. The RESET pin causes the same reset/initialization to occur without de-powering the part.
上传时间： 2014-01-18
上传用户：bs2005
The P82B96 offers many different ways in which it can be used as abus interface. In its simplest application it can be used as aninterface between bus systems operating from different supplyvoltages. Opto isolation between two bus systems is possible, andalso the availability of the Tx and Rx signals permits interfacing ofthe P82B96 with other bus systems which separate the forwardoutput path, from the backward input signal path.
上传时间： 2013-10-11
上传用户：洛木卓
MSP430系列单片机C语言程序设计与开发MSP430系列是一个具有明显技术特色的单片机品种。关于它的硬件特性及汇编语言程序设计已在《MSP430系列超低功耗16位单片机的原理与应用》及《MSP430系列 FLASH型超低功耗16位单片机》等书中作了全面介绍。《MSP430系列单片机C语言程序设计与开发》介绍IAR公司为MSP430系列单片机配备的C程序设计语言C430。书中叙述了C语言的基本概念、C430的扩展特性及C库函数；对C430的集成开发环境的使用及出错信息作了详尽的说明；并以MSP430F149为例，对各种应用问题及外围模块操作提供了典型的C程序例程，供读者在今后的C430程序设计中参考。 《MSP430系列单片机C语言程序设计与开发》可以作为高等院校计算机、自动化及电子技术类专业的教学参考书，也可作为工程技术人员设计开发时的技术资料。MSP430系列超低功耗16位单片机的原理与应用目录MSP430系列单片机C语言程序设计与开发 目录 第1章 C语言基本知识1.1 标识符与关键字11.1.1 标识符11.1.2 关键字11.2 数据基本类型21.2.1 整型数据21.2.2 实型数据31.2.3 字符型数据41.2.4 各种数据转换关系61.3 C语言的运算符71.3.1 算术运算符71.3.2 关系运算符和逻辑运算符71.3.3 赋值运算符81.3.4 逗号运算符81.3.5 ? 与 ：运算符81.3.6 强制转换运算符91.3.7 各种运算符优先级列表91.4 程序设计的三种基本结构101.4.1 语句的概念101.4.2 顺序结构111.4.3 选择结构121.4.4 循环结构141.5 函数181.5.1 函数定义181.5.2 局部变量与全局变量191.5.3 形式参数与实际参数201.5.4 函数调用方式201.5.5 函数嵌套调用211.5.6 变量的存储类别221.5.7 内部函数和外部函数231.6 数组231.6.1 一维数组241.6.2 多维数组241.6.3 字符数组261.7 指针271.7.1 指针与地址的概念271.7.2 指针变量的定义281.7.3 指针变量的引用281.7.4 数组的指针281.7.5 函数的指针301.7.6 指针数组311.8 结构和联合321.8.1 结构定义321.8.2 结构类型变量的定义331.8.3 结构类型变量的初始化341.8.4 结构类型变量的引用341.8.5 联合341.9 枚举361.9.1 枚举的定义361.9.2 枚举元素的值371.9. 3 枚举变量的使用371.10 类型定义381.10.1 类型定义的形式381.10.2 类型定义的使用381.11 位运算391.11.1 位运算符391.11.2 位域401.12 预处理功能411.12.1 简单宏定义和带参数宏定义411.12.2 文件包含431.12.3 条件编译命令44第2章 C430--MSP430系列的C语言2.1 MSP430系列的C语言452.1.1 C430概述452.1.2 C430程序设计工作流程462.1.3 开始462.1.4 C430程序生成472.2 C430的数据表达482.2.1 数据类型482.2.2 编码效率502.3 C430的配置512.3.1 引言512.3. 2 存储器分配522.3.3 堆栈体积522.3.4 输入输出522.3.5 寄存器的访问542.3.6 堆体积542.3.7 初始化54第3章 C430的开发调试环境3.1 引言563.1.1 Workbench特性563.1.2 Workbench的内嵌编辑器特性563.1.3 C编译器特性573.1. 4 汇编器特性573.1.5 连接器特性583.1.6 库管理器特性583.1.7 C?SPY调试器特性593.2 Workbench概述593.2.1 项目管理模式593.2.2 选项设置603.2.3 建立项目603.2.4 测试代码613.2.5 样本应用程序613.3 Workbench的操作623.3.1 开始633.3.2 编译项目683.3.3 连接项目693.3.4 调试项目713.3.5 使用Make命令733.4 Workbench的功能汇总753.4.1 Workbench的窗口753.4.2 Workbench的菜单功能813.5 Workbench的内嵌编辑器993.5.1 内嵌编辑器操作993.5.2 编辑键说明993.6 C?SPY概述1013.6.1 C?SPY的C语言级和汇编语言级调试1013.6.2 程序的执行1023.7 C?SPY的操作1033.7.1 程序生成1033.7.2 编译与连接1033.7.3 C?SPY运行1033.7.4 C语言级调试1043.7.5 汇编级调试1113.8 C?SPY的功能汇总1133.8.1 C?SPY的窗口1133.8.2 C?SPY的菜单命令功能1203.9 C?SPY的表达式与宏1323.9.1 汇编语言表达式1323.9.2 C语言表达式1333.9.3 C?SPY宏1353.9.4 C?SPY的设置宏1373.9.5 C?SPY的系统宏137 第4章 C430程序设计实例4.1 程序设计与调试环境1434.1.1 程序设计调试集成环境1434.1.2 设备连接1444.1.3 ProF149实验系统1444.2 数值计算1454.2.1 C语言表达式1454.2.2 利用MPY实现运算1464.3 循环结构1474.4 选择结构1484.5 SFR访问1494.6 RAM访问1504.7 FLASH访问1514.8 WDT操作1534.8. 1 WDT使程序自动复位1534.8.2 程序对WATCHDOG计数溢出的控制1544.8.3 WDT的定时器功能1554.9 Timer操作1554.9.1 用Timer产生时钟信号1554.9.2 用Timer检测脉冲宽度1564.10 UART操作1574.10.1 点对点通信1574.10.2 点对多点通信1604.11 SPI操作1634.12 比较器操作1654.13 ADC12操作1674.13.1 单通道单次转换1674.13.2 序列通道多次转换1684.14 时钟模块操作1704.15 中断服务程序1714.16 省电工作模式1754.17 调用汇编语言子程序1764.17.1 程序举例1764.17.2 生成C程序调用的汇编子程序177第5章 C430的扩展特性5.1 C430的语言扩展概述1785.1.1 扩展关键字1785.1.2 #pragma编译命令1785.1.3 预定义符号1795.1.4 本征函数1795.1.5 其他扩展特性1795.2 C430的关键字扩展1795.2.1 interrupt1805.2.2 monitor1805.2.3 no_init1815.2.4 sfrb1815.2.5 sfrw1825.3 C430的 #pragma编译命令1825.3.1 bitfields=default1825.3.2 bitfields=reversed1825.3.3 codeseg1835.3.4 function=default1835.3.5 function=interrupt1845.3.6 function=monitor1845.3.7 language=default1845.3.8 language=extended1845.3.9 memory=constseg1855.3.10 memory=dataseg1855.3.11 memory=default1855.3.12 memory=no_init1865.3.13 warnings=default1865.3.14 warnings=off1865.3.15 warnings=on1865.4 C430的预定义符号1865.4.1 DATE1875.4.2 FILE1875.4.3 IAR_SYSTEMS_ICC1875.4.4 LINE1875.4.5 STDC1875.4.6 TID1875.4.7 TIME1885.4.8 VER1885.5 C430的本征函数1885.5.1 _args＄1885.5.2 _argt＄1895.5.3 _BIC_SR1895.5.4 _BIS_SR1905.5.5 _DINT1905.5.6 _EINT1905.5.7 _NOP1905.5.8 _OPC1905.6 C430的汇编语言接口1915.6.1 创建汇编子程序框架1915.6.2 调用规则1915.6.3 C程序调用汇编子程序1935.7 C430的段定义1935.7.1 存储器分布与段定义1945.7.2 CCSTR段1945.7.3 CDATA0段1945.7.4 CODE段1955.7.5 CONST1955.7.6 CSTACK1955.7.7 CSTR1955.7.8 ECSTR1955.7.9 IDATA01965.7.10 INTVEC1965.7.11 NO_INIT1965.7.12 UDATA0196第6章 C430的库函数6.1 引言1976.1.1 库模块文件1976.1.2 头文件1976.1.3 库定义汇总1976.2C 库函数参考2046.2.1 C库函数的说明格式2046.2.2 C库函数说明204第7章 C430编译器的诊断消息7.1 编译诊断消息的类型2307.2 编译出错消息2317.3 编译警告消息243附录 AMSP430系列FLASH型芯片资料248附录 BProF149实验系统251附录 CMSP430x14x.H文件253附录 DIAR MSP430 C语言产品介绍275
上传时间： 2014-05-05
上传用户：253189838
