BUS+HOUND 技术资料

Universal Serial Bus Device Class Definition For Content Security Devices.pdf

Universal Serial Bus Device Class Definition for Audio Data Formats.pdf

VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave"…

这是一个连通OPB和Wishbone Bus的Bridge, 能够让OPB与开源的Wishbone Bus连接通信， 从而使用基于Wishbone的许多开源IP Core

IDE bus master的技术文档 Bus master通过DMA将数据从ATA设备传输到内存中

use of NIOS PIO to simulate I2C bus,to initial TVP5150

基于CAN-bus的电梯教学模型

freescale can bus application code using freescale mcu and codewarrior platform

ADT7470驱动,SM-BUS接口,驱动,同I2C

High Definition Audio Bus Specification Rev 1.0, design change notes 2006.