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Analysis-Synthesis

  • DDR SDRAM控制器的VHDL源代码

    DDR SDRAM控制器的VHDL源代码,含详细设计文档。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides the required Delay Locked Loop (DLL), Digital Phase Shift (DPS), and Digital Frequency Synthesis (DFS) functions. This application note describes a controller design for a 16-bit DDR SDRAM. The application note and reference design are enhanced versions of XAPP200 targeted to the Virtex-II series of FPGAs. At a clock rate of 133 MHz, 16-bit data changes at both clock edges. The reference design is fully synthesizable and achieves 133 MHz performance with automatic place and route tools.

    标签: SDRAM VHDL DDR 控制器

    上传时间: 2014-11-01

    上传用户:l254587896

  • 一个自然语言处理的Java开源工具包。LingPipe目前已有很丰富的功能

    一个自然语言处理的Java开源工具包。LingPipe目前已有很丰富的功能,包括主题分类(Top Classification)、命名实体识别(Named Entity Recognition)、词性标注(Part-of Speech Tagging)、句题检测(Sentence Detection)、查询拼写检查(Query Spell Checking)、兴趣短语检测(Interseting Phrase Detection)、聚类(Clustering)、字符语言建模(Character Language Modeling)、医学文献下载/解析/索引(MEDLINE Download, Parsing and Indexing)、数据库文本挖掘(Database Text Mining)、中文分词(Chinese Word Segmentation)、情感分析(Sentiment Analysis)、语言辨别(Language Identification)等API。

    标签: LingPipe Java 自然语言处理 开源

    上传时间: 2013-12-04

    上传用户:15071087253

  • 97 law to enhance the classic procedure Ridge wavelet extraction Modulus maximum for the wavelet

    97 law to enhance the classic procedure Ridge wavelet extraction Modulus maximum for the wavelet edge detection Small spectral analysis method mallat classic procedure

    标签: wavelet extraction the procedure

    上传时间: 2014-01-09

    上传用户:xg262122

  • 编译原理课程设计

    编译原理课程设计,包括词法,语 义分析,功能全面!-the class design about principle of complier.it contains analysis of word ,gram and mine about language .

    标签: 编译原理

    上传时间: 2014-01-04

    上传用户:zhuyibin

  • Design of Integrated Circuits for Optical Communications deals with the design of high-speed integra

    Design of Integrated Circuits for Optical Communications deals with the design of high-speed integrated circuits for optical communication systems. Written for both students and practicing engineers, the book systematically takes the reader from basic concepts to advanced topics, establishing both rigor and intuition. The text emphasizes analysis and design in modern VLSI technologies, particularly CMOS, and presents numerous broadband circuit techniques. Leading researcher Behzad Razavi is also the author of Design of Analog CMOS Integrated Circuits.

    标签: Communications Integrated high-speed Circuits

    上传时间: 2013-12-21

    上传用户:zhouchang199

  • ECE345, Visual-to-Audio Electronic Travel Aid Code for TM320C54x (v2a.asm) download This project

    ECE345, Visual-to-Audio Electronic Travel Aid Code for TM320C54x (v2a.asm) download This project involves the design and implementation of a audio synthesis device that converts moving images into audio signals. The system is built on a TM320C54x DSP with interface to an IMAQ camera module via the serial port on a PC. Brief description: A LabVIEW VI acquires an image from the IMAQ camera module. It quantizes the image into a 5x5, 3-bit image, and sends the data to the TM320C54x DSP via a serial port. The TM320C54x DSP constructs a 64-tap FIR by combining a series of 64-tap head related transfer functions (HRTF) according to the incoming data, and then filters an input audio signal with this FIR filter, in effect creating a correspondence between the filtered signal and the original image.

    标签: Visual-to-Audio Electronic download project

    上传时间: 2017-02-01

    上传用户:笨小孩

  • 正则表达式的分析解释控件

    正则表达式的分析解释控件,适用于delphi各版本-is a regular expression analysis explained Control, applicable to all versions of delphi [引自此网络]

    标签: 控件 表达式

    上传时间: 2017-02-02

    上传用户:

  • 8051单片机源码verilog版本 包括rtl

    8051单片机源码verilog版本 包括rtl, testbench, synthesis

    标签: verilog 8051 rtl 单片机

    上传时间: 2014-01-14

    上传用户:yuanyuan123

  • 1. Learn the basic constructs of VHDL 2. Learn the modeling structure of VHDL 3. Understand the de

    1. Learn the basic constructs of VHDL 2. Learn the modeling structure of VHDL 3. Understand the design environments – Simulation – Synthesis

    标签: the Learn VHDL Understand

    上传时间: 2017-02-18

    上传用户:love_stanford

  • Ictclas分词系统

    Ictclas分词系统,文词法分析是中文信息处理的基础与关键。中国科学院计算技术研究所在多年研究工作积累的基础上,研制出了汉语词法分析系统ICTCLAS(Institute of Computing Technology, Chinese Lexical Analysis System)

    标签: Ictclas

    上传时间: 2017-02-18

    上传用户:569342831