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Amplifier-Vietnamese

  • 电流检测电路中运算放大器与ADC的设计

    电学中的测量技术涉及范围非常广,电流测量在电学计量中占有非常重要的位置。如何精确地进行电流测量是精密测量的一大难题。传统的电流检测电路多采用运算放大芯片与片外电流检测电路相结合的方式,电路集成度很低,需要较多的接口和资源才能完成对电路的检测。本文把所有电路部分都集成在一块芯片上,包括检测电阻,运算放大器电路及模拟转数字转换电路,从而在电路内部可以进行电流检测,使电路更好的集成化。前置电路使用二级共源共栅结构的运算放大器,减小沟道长度调制效应造成的电流误差。10位SAR ADC中采用电容驱动能力强的传输门保证了模数转化器的有效精度。比较器模块采用再生锁存器与迟滞比较器作为基础单元组合解决精密测量的问题。本设计可以作为嵌入芯片内的一小部分而检测芯片中的微小电流1mA~100mA,工作电压在1.8v左右,电流检测精度预期达到10uA的需求。The measurement technology in electricity involves a wide range,and current measurement plays a very important position in electrical measurement.How to accurately measure current is a big problem in precision measurement. The traditional current detecting circuit adopts the combination of the operational amplifier chip and theoff-chip current detecting circuit, The circuit integration is very low, and more interfaces and resources are needed tocomplete the circuit detection.This topic integrates all the circuit parts into one chip, including detection resistance, operational amplifier circuit andanalog to digital conversion circuit. Highly integrated circuit makes the external resources on the chip more intensive,so that current detection can be carried out inside the circuit, so that the circuit can be better integrated. Thefront-end circuit of this project uses two-stage cascade operational amplifier and cascade tube to reduce the currenterror caused by channel length modulation effect. In 10-bit SAR ADC, the transmission gate with strong capacitivedriving ability ensures the effective accuracy of the analog-to-digital converter. Comparator module uses regenerativelatch and hysteresis comparator as basic unit to solve the difficult problem of precision measurement. This topic can beused as a small part of the embedded chip to detect the micro-current in the chip 1 mA~100 mA, the working voltageis about 1.8v, and the current detection accuracy is expected to reach the requirement of 10 uA.

    标签: 电流检测 电路 运算放大器 adc

    上传时间: 2022-04-03

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  • 一种低成本高可靠的SFP+光收发模块电路研究与实现

    本文首次设计并验证了基于macom三合一芯片设计的光模块电路,该电路旨在提供一种满足SFF-8472中规定的数字诊断功能的低成本SFP+模块。电路采用激光器驱动、限幅放大器、控制器以及时钟恢复单元集成的单芯片,在保证高精度数字诊断功能基础上,实现了低成本高可靠的特点。该电路在光接收接口组件与激光器驱动和限幅放大器单元的限幅放大器部分之间接入滤波器来提高模块的灵敏度及信号质量。在控制器单元的数字电位器的引脚上采用外加电阻的方式避免出现上电不发光的故障问题。该研究结果为下一代SFP-DD光模块设计与开发工作,奠定了一定的理论与实践基础。This paper designs and validates the optical module circuit based on the MACOM Trinity chip for the first time.This circuit aims to provide a low-cost SFP module which meets the digital diagnosis function specified in SFF-8472.The circuit uses a single chip integrated with laser driver,limiting amplifier,controller and clock recovery unit.On the basis of ensuring high precision digital diagnosis function,it achieves the characteristics of low cost and high reliability.The circuit connects a filter between the optical receiving interface module and the limiting amplifier part of the laser driver and limiting amplifier unit to improve the sensitivity and signal quality of the module.The pin of the digital potentiometer in the controller unit is equipped with an external resistance to avoid the problem of power failure.The research results lay a theoretical and practical foundation for optical module design in high-speed data center.

    标签: sfp 光收发模块

    上传时间: 2022-04-03

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  • 无线局域网接收机射频前端集成电路设计

    近年来,随着个人数据通信的发展,功能强大的便携式数据终端和多媒体终端得到了广泛的应用。为了实现用户在任何时间、任何地点均能实现数据通信的目标,要求传统的计算机网络由有线向无线、由固定向移动、由单一业务向多媒体发展,这一要求促进了无线局域网技术的发展。在互联网高速发展的今天,可以认为无线局域网将成为未来的发展趋势.本课题采用TSMC 0.18um CMOS工艺实现用于IEEE 802.1la协议的5GHz无线局域网接收机射频前端集成电路一包括低噪声放大器(Low-Noise Amplifier,LNA)和下变频器电路(Downconverter),低噪声放大器是射频接收机前端的主要部分,其作用是在尽可能少引入噪声的条件下对天线接收到的微弱信号进行放大。下变须器是接收机的重要组成部分,它将低噪声放大器的输出射频信号与本振信号进行混频,产生中频信号。论文对射频前端集成电路的原理进行了分析,比较了不同电路结构的性能,给出了射频前端集成电路的电路设计、版图设计、仿真结果和测试方案,仿真结果表明,此次设计的射频前端集成电路具有低噪声、低功耗的特点,其它性能也完全满足设计指标要求

    标签: 无线局域网 接收机

    上传时间: 2022-06-20

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