源码文件
[LOW] 2 SPIEN Serial Program Downloading Enabled FSTRT Short Start-up time …
Altova+XML 源代码
汇集 Altova+XML 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
收录资源 500 份
全站深度检索
共匹配 500 份工程资源
· 第 8 / 50 页
源码文件
54 8 0x80 0x00 Divide clock by 8 internally; [CKDIV8=0] 0x40 0x00 Clock output on…
源码文件
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB…
源码文件
2 0x20 0x00 Serial program downloading (SPI) enabled 0x01 0x00 Short start-up time en…
源码文件
8 CLKDIV8 Divide clock by 8 0 CKOUT Oscillator options 1 SUT1 Sel…
源码文件
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB…
源码文件
8 BODLEVEL Brown out detector trigger level 1 BODEN Brown out detector enable 1 …
源码文件
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB…
源码文件
8 CLKDIV8 Divide clock by 8 0 CKOUT Clock output 1 SUT1 Select st…
源码文件
8 PLLCK Use PLL for internal clock 1 CKOPT Oscillator options 1 SUT1 …