源码文件
FILES { VHDL_FILE = firfilter1.vhd; } COMPILER_SETTINGS_LIST { COMPILER_SETTINGS = filfiter1; } SIMULATOR_SETTINGS_LIST …
Altera+Quartus 源代码
汇集 Altera+Quartus 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
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源码文件
FILES { VHDL_FILE = firfilter1.vhd; } COMPILER_SETTINGS_LIST { COMPILER_SETTINGS = filfiter1; } SIMULATOR_SETTINGS_LIST …
源码文件
FILES { VHDL_FILE = firfilter1.vhd; } COMPILER_SETTINGS_LIST { COMPILER_SETTINGS = filfiter1; } SIMULATOR_SETTINGS_LIST …
源码文件
FILES { VHDL_FILE = firfilter1.vhd; } COMPILER_SETTINGS_LIST { COMPILER_SETTINGS = filfiter1; } SIMULATOR_SETTINGS_LIST …
源码文件
源码文件
FILES { VHDL_FILE = CNTL_LOG.VHD; VHDL_FILE = DOUT_MUX.VHD; VHDL_FILE = PORTAIN.VHD; VHDL_FILE = PORTAOUT.VHD; VHDL_FIL…
源码文件
FILES { VHDL_FILE = firfilter1.vhd; } COMPILER_SETTINGS_LIST { COMPILER_SETTINGS = filfiter1; } SIMULATOR_SETTINGS_LIST …
源码文件
FILES { VHDL_FILE = CNTL_LOG.VHD; VHDL_FILE = DOUT_MUX.VHD; VHDL_FILE = PORTAIN.VHD; VHDL_FILE = PORTAOUT.VHD; VHDL_FIL…
源码文件
FILES { VHDL_FILE = altera_vhdl_support.vhd; VHDL_FILE = ext_ram_lane0_module.vhd; VHDL_FILE = ext_ram_lane1_module.vhd; …
源码文件
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*********…