FILES { VHDL_FILE = CNTL_LOG.VHD; VHDL_FILE = DOUT_MUX.VHD; VHDL_FILE = PORTAIN.VHD; VHDL_FILE = PORTAOUT.VHD; VHDL_FIL…
Altera Quartus 源代码
汇集 Altera Quartus 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
FILES { VHDL_FILE = CNTL_LOG.VHD; VHDL_FILE = DOUT_MUX.VHD; VHDL_FILE = PORTAIN.VHD; VHDL_FILE = PORTAOUT.VHD; VHDL_FIL…
FILES { VHDL_FILE = addr_latch.vhd; VHDL_FILE = data_latch.vhd; VHDL_FILE = dout_mux.vhd; VHDL_FILE = Proc.vhd; VHDL_FI…
FILES { VHDL_FILE = BRKMUX.VHD; VHDL_FILE = BUS_CNTL.VHD; VHDL_FILE = CNTL_REG.VHD; VHDL_FILE = DATACNT.VHD; VHDL_FILE …
FILES { VHDL_FILE = sdram64m16.vhd; VECTOR_WAVEFORM_FILE = sdram64m16.vwf; } COMPILER_SETTINGS_LIST { COMPILER_SETTINGS …
Assembler report for lbstry Thu Aug 29 08:48:50 2013 Version 5.0 Build 148 04/26/2005 SJ Full Version ---------------------…
-- Copyright (C) 1991-2005 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other so…
/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that …
Flow report for lbstry Thu Aug 29 08:48:52 2013 Version 5.0 Build 148 04/26/2005 SJ Full Version --------------------- ; T…
-------------------------------------------------------------------------------------- Timing Analyzer Summary -----------------…