搜索结果
找到约 44 项符合
9500 的查询结果
技术资料 使用XC9500XL时序模块
All XC9500XL CPLDs have a uniform architecture and anidentical timing model, making them very ea
技术资料 高速XC9500XL的设计
CPLD design has advanced significantly beyond that of fastPAL design. Today's CPLDs must operate
技术资料 XC9500XL的功率耗散
Power estimation for CMOS circuits appears to be deceptivelystraightforward. Most vendors provid
技术资料 XC9500XL的功率耗散
Power estimation for CMOS circuits appears to be deceptivelystraightforward. Most vendors provid
技术资料 使用XC9500XL时序模块
All XC9500XL CPLDs have a uniform architecture and anidentical timing model, making them very ea
技术资料 高速XC9500XL的设计
CPLD design has advanced significantly beyond that of fastPAL design. Today's CPLDs must operate
技术资料 XC9500XL CPLD器件进行设计
To get the best performance from any CPLD the designermust be aware of its internal architecture
技术资料 XC9500XL CPLD器件进行设计
To get the best performance from any CPLD the designermust be aware of its internal architecture
技术资料 使用XC9500 JTAG边界扫描接口
IEEE Boundary-Scan Standard 1149.1, also known asJTAG, is a testing standard that uses software
技术资料 XC9500的远程现场升级方法
Throughout this application note, frequent reference will bemade to XAPP058 and VHDL code for th