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ini modelsim.ini

[Library] others = $MODEL_TECH/../modelsim.ini ; Altera specific primitive library mappings work = modelsim_work [vcom] ; Turn on VHDL-1993 as the default. Normally is off. ; VHDL93 = 1
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www.eeworm.com/read/326943/3465609

ini modelsim.ini

[Library] others = $MODEL_TECH/../modelsim.ini ; Altera specific primitive library mappings work = modelsim_work [vcom] ; Turn on VHDL-1993 as the default. Normally is off. ; VHDL93 = 1
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www.eeworm.com/read/301574/3837633

ini modelsim.ini

[Library] others = $MODEL_TECH/../modelsim.ini ; Altera specific primitive library mappings work = modelsim_work [vcom] ; Turn on VHDL-1993 as the default. Normally is off. ; VHDL93 = 1
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www.eeworm.com/read/300544/3846168

do colorconv_sim.do

# # ModelSim simulation script # # # project color_conv. # vlib work # Compile vcom -93 -work work ..\\..\\rtl\\vhdl\\ccfactors_pkg.vhd vcom -93 -work work ..\\..\\rtl\\vhdl\\colorconv.vhd vcom -9
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www.eeworm.com/read/285694/4047539

ini modelsim.ini

[Library] others = $MODEL_TECH/../modelsim.ini ; Altera specific primitive library mappings work = modelsim_work [vcom] ; Turn on VHDL-1993 as the default. Normally is off. ; VHDL93 = 1
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www.eeworm.com/read/18466/790118

ref hdpdeps.ref

V1 7 FL F:/lqj/1/BulkIn/FPGA/Top.vhdl 2006/11/15.10:40:38 FL F:/lqj/1/FPGA/FPGA/Top.vhdl 2006/10/22.17:59:24 FL E:/study/software/FPGA/FPGA+USB/BulkIn/FPGA/Top.vhdl 2007/07/17.21:24:02 EN work/TOP
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www.eeworm.com/read/230016/4726730

ref hdpdeps.ref

V1 7 FL F:/lqj/1/BulkIn/FPGA/Top.vhdl 2006/11/15.10:40:38 FL F:/lqj/1/FPGA/FPGA/Top.vhdl 2006/10/22.17:59:24 FL E:/study/software/FPGA/FPGA+USB/BulkIn/FPGA/Top.vhdl 2007/07/17.21:24:02 EN work/TOP
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www.eeworm.com/read/384728/8849105

vhd 44_synthesis_types.vhd

-------------------------------------------------------------------------- -- SOME VHDL DATA TYPES TO FACILITATE SYNTHESIS -- Developed on Nov 1, 1991 by : -- I
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www.eeworm.com/read/384728/8849202

vhd 7_synthesis_types.vhd

-------------------------------------------------------------------------- -- SOME VHDL DATA TYPES TO FACILITATE SYNTHESIS -- Developed on Nov 1, 1991 by : -- I
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www.eeworm.com/read/384728/8849480

vhd 67_ellipf.vhd

---------------------------------------------------------------------------- -- -- -- Elliptical Wave Filter Benchmark -- -- -- VHDL Benchmark author: D. Sreenivasa Rao --
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