代码搜索：vhdl
找到约 10,000 项符合「vhdl」的源代码
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www.eeworm.com/read/32453/1034338
100vhdl+
-- _ _
-- L
---------------------------OO-------OO---------------------------------
--
www.eeworm.com/read/32453/1034339
100vhdl+
www.eeworm.com/read/32453/1034340
100vhdl+
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
package mycntpkg is
component count port(clk,rst : in std_logic;
cnt : inout std_logic_vector(2 downto 0));
www.eeworm.com/read/32453/1034341
100vhdl+
library IEEE;
use IEEE.std_logic_1164.all;
entity testcnt is
end testcnt;
use work.mycntpkg.all;
architecture mytest of testcnt is
signal clk,rst:std_logic;
signal cnt:std_logic_vector(2 d
www.eeworm.com/read/32453/1034342
100vhdl+
library IEEE;
use IEEE.std_logic_1164.all;
-----------------------------------------------------------
entity B_CONST1 is
-----------------------------------------------------------
generic
(
NU
www.eeworm.com/read/32453/1034343
100vhdl+
www.eeworm.com/read/32453/1034344
100vhdl+
--------------------------------------------------------------------------------
--
-- AM2901 Benchmark
--
-- Source: AMD data book
--
---------------------------------------------------------
www.eeworm.com/read/32453/1034345
100vhdl+
-------------------------------------------------------HS
-- types and mvl_functions are moved in l2901_lib
-- so that they are not needed to complie every time
-- modified by hanshu,June 4,1
www.eeworm.com/read/32453/1034346
100vhdl+
-- _ _
-- L
---------------------------OO-------OO---------------------------------
--
www.eeworm.com/read/32453/1034347
100vhdl+
library ieee;
use ieee.std_logic_1164.all;
use work.p_alarm.all;
entity tb_alarm_clock is
end tb_alarm_clock;
architecture test of tb_alarm_clock is
component alarm_clock
port(ke