代码搜索：vhdl
找到约 10,000 项符合「vhdl」的源代码
代码结果 10,000
www.eeworm.com/read/32453/1034178
100vhdl+
--------------------------------------------------------------------------
-- --
-- Copyright (c) 1990, 1991 by Synopsys, Inc. A
www.eeworm.com/read/32453/1034179
100vhdl+
Library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use work.SIGNED_ARITH.all;
entity tb_e is
end tb_e;
architecture tb_a of tb_e is
signal clock,reset:std_logic;
si
www.eeworm.com/read/32453/1034180
100vhdl+
Library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use work.SIGNED_ARITH.all;
package coeffs is
type coef_arr is array (0 to 16) of signed (8 downto 0);
constant coef
www.eeworm.com/read/32453/1034181
100vhdl+
Library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use work.SIGNED_ARITH.all;
use work.coeffs.all;
entity fir is
port(clk,reset: in std_logic;
sample: in signed (
www.eeworm.com/read/32453/1034182
100vhdl+
www.eeworm.com/read/32453/1034183
100vhdl+
entity adder is
port (
in1 : in bit_vector;
in2 : in bit_vector;
pout : out bit_vector
);
end adder;
architecture func of adder is
begin
process(in1,in2)
begin
www.eeworm.com/read/32453/1034184
100vhdl+
-- Page : 328 - 328
--
-- Objective : Solution for Test_158
--
-- File Name : test_159.vhd
--
-- Author : Joseph Pick
--
entity Test_159 is
end Test_159;
architecture Behav
www.eeworm.com/read/32453/1034185
100vhdl+
--Page :294,295
--Objective :Multiple array inputs
--Filename :test_28.vhd
--Author :Joseph Pick
entity Test_28 is
end Test_28 ;
architecture Behave_1 of Tes
www.eeworm.com/read/32453/1034186
100vhdl+
-- Page : 345 -346
--
-- Objective : constancy of for loop bounds
--
-- File Name : test_194.vhd
--
-- Author : Joseph Pick
--
entity Test_194 is
end Test_194;
architecture
www.eeworm.com/read/32453/1034187
100vhdl+
entity Test_18e is
end Test_18e;
architecture Behave_1 of Test_18e is
signal A : BIT := '0';
signal B : BIT := '0';
signal C : BIT := '0';
begin
Gen_Wave:
process
begin