代码搜索：verilog hdl 是什么？
找到约 10,000 项符合「verilog hdl 是什么？」的源代码
代码结果 10,000
www.eeworm.com/read/159314/5585948
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_ckbuf is
port(
o : out vl_logic;
i : in vl_logic
);
end x_ckbuf;
www.eeworm.com/read/159314/5585953
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_ramb16_s2_s9 is
generic(
cds_action : string := "ignore";
init_a : integer := 0;
init_b : intege
www.eeworm.com/read/159314/5585959
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_ramb16_s2_s4 is
generic(
cds_action : string := "ignore";
init_a : integer := 0;
init_b : intege
www.eeworm.com/read/159314/5585979
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_ramb16_s9 is
generic(
cds_action : string := "ignore";
init : integer := 0;
srval : integer :
www.eeworm.com/read/159314/5585990
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_upad is
port(
pad : inout vl_logic
);
end x_upad;
www.eeworm.com/read/159314/5585995
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_ramb16_s4_s18 is
generic(
cds_action : string := "ignore";
init_a : integer := 0;
init_b : integ
www.eeworm.com/read/159314/5585998
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_ramb16_s1_s4 is
generic(
cds_action : string := "ignore";
init_a : integer := 0;
init_b : intege
www.eeworm.com/read/159314/5586001
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_ramb16_s2_s36 is
generic(
cds_action : string := "ignore";
init_a : integer := 0;
init_b : integ
www.eeworm.com/read/159314/5586002
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_ramb16_s1_s36 is
generic(
cds_action : string := "ignore";
init_a : integer := 0;
init_b : integ
www.eeworm.com/read/159314/5586010
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_pu is
port(
o : out vl_logic
);
end x_pu;