代码搜索：verilog hdl 是什么？
找到约 10,000 项符合「verilog hdl 是什么？」的源代码
代码结果 10,000
www.eeworm.com/read/159314/5585791
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ibufgds is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
www.eeworm.com/read/159314/5585792
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity bufgls is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
www.eeworm.com/read/159314/5585801
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufd_f_24 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_log
www.eeworm.com/read/159314/5585807
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ramb4_s1_s16 is
generic(
cds_action : string := "ignore";
init_00 : integer := 0;
init_01 : integer
www.eeworm.com/read/159314/5585809
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity pullup is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic
);
end pullup;
www.eeworm.com/read/159314/5585814
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufndn_s_24 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_l
www.eeworm.com/read/159314/5585822
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity obufdn is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
www.eeworm.com/read/159314/5585824
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity inv is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
www.eeworm.com/read/159314/5585832
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity tck is
generic(
cds_action : string := "ignore"
);
port(
i : inout vl_logic
);
end tck;
www.eeworm.com/read/159314/5585833
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity cy4_37 is
generic(
cds_action : string := "ignore"
);
port(
c0 : out vl_logic;
c1