代码搜索：verilog hdl 是什么？
找到约 10,000 项符合「verilog hdl 是什么？」的源代码
代码结果 10,000
www.eeworm.com/read/159314/5585306
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity cy4_15 is
generic(
cds_action : string := "ignore"
);
port(
c0 : out vl_logic;
c1
www.eeworm.com/read/159314/5585308
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ramb16_s2_s2 is
generic(
cds_action : string := "ignore";
init_a : integer := 0;
init_b : integer
www.eeworm.com/read/159314/5585313
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity buffclk is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
www.eeworm.com/read/159314/5585319
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity obufe is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
e
www.eeworm.com/read/159314/5585320
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity cy4_34 is
generic(
cds_action : string := "ignore"
);
port(
c0 : out vl_logic;
c1
www.eeworm.com/read/159314/5585331
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvttl_f_4 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl
www.eeworm.com/read/159314/5585332
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity cy4_23 is
generic(
cds_action : string := "ignore"
);
port(
c0 : out vl_logic;
c1
www.eeworm.com/read/159314/5585333
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity keeper is
generic(
cds_action : string := "ignore"
);
port(
o : inout vl_logic
);
end keeper;
www.eeworm.com/read/159314/5585334
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvcmos33_s_12 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in
www.eeworm.com/read/159314/5585339
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufnsn_f is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_logi