代码搜索：verilog hdl 是什么？
找到约 10,000 项符合「verilog hdl 是什么？」的源代码
代码结果 10,000
www.eeworm.com/read/159314/5585166
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity cy4_41 is
generic(
cds_action : string := "ignore"
);
port(
c0 : out vl_logic;
c1
www.eeworm.com/read/159314/5585168
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvcmos15_f_12 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in
www.eeworm.com/read/159314/5585171
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity gt_xaui_1 is
generic(
chan_bond_mode : string := "OFF";
chan_bond_one_shot: string := "FALSE";
clk_cor_insert_idle_flag
www.eeworm.com/read/159314/5585172
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvttl_s_6 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl
www.eeworm.com/read/159314/5585186
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity mult18x18s is
port(
p : out vl_logic_vector(35 downto 0);
a : in vl_logic_vector(17 downto 0);
www.eeworm.com/read/159314/5585187
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvttl_s_12 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in v
www.eeworm.com/read/159314/5585191
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity cy4_25 is
generic(
cds_action : string := "ignore"
);
port(
c0 : out vl_logic;
c1
www.eeworm.com/read/159314/5585195
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ibufn is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
www.eeworm.com/read/159314/5585198
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity cy4_18 is
generic(
cds_action : string := "ignore"
);
port(
c0 : out vl_logic;
c1
www.eeworm.com/read/159314/5585203
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ramb4_s1_s1 is
generic(
cds_action : string := "ignore";
init_00 : integer := 0;
init_01 : integer :