代码搜索：verilog hdl 是什么？
找到约 10,000 项符合「verilog hdl 是什么？」的源代码
代码结果 10,000
www.eeworm.com/read/159314/5585135
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvcmos33_f_16 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in
www.eeworm.com/read/159314/5585138
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity tms is
generic(
cds_action : string := "ignore"
);
port(
i : inout vl_logic
);
end tms;
www.eeworm.com/read/159314/5585145
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity gt_xaui_2 is
generic(
chan_bond_mode : string := "OFF";
chan_bond_one_shot: string := "FALSE";
clk_cor_insert_idle_flag
www.eeworm.com/read/159314/5585146
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvttl_s_4 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl
www.eeworm.com/read/159314/5585149
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ramb4_s4_s8 is
generic(
cds_action : string := "ignore";
init_00 : integer := 0;
init_01 : integer :
www.eeworm.com/read/159314/5585152
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ramb16_s4_s36 is
generic(
cds_action : string := "ignore";
init_a : integer := 0;
init_b : integer
www.eeworm.com/read/159314/5585157
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufd_s_24 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_log
www.eeworm.com/read/159314/5585161
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity bufgs_f is
port(
o : out vl_logic;
i : in vl_logic
);
end bufgs_f;
www.eeworm.com/read/159314/5585164
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ramb16_s1_s1 is
generic(
cds_action : string := "ignore";
init_a : integer := 0;
init_b : integer
www.eeworm.com/read/159314/5585165
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ramb16_s1 is
generic(
cds_action : string := "ignore";
init : integer := 0;
srval : integer :=