代码搜索：verilog hdl 是什么？
找到约 10,000 项符合「verilog hdl 是什么？」的源代码
代码结果 10,000
www.eeworm.com/read/159314/5585180
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ldcpe_1 is
generic(
cds_action : string := "ignore";
init : integer := 0
);
port(
q
www.eeworm.com/read/159314/5585189
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ram32x1d_1 is
generic(
cds_action : string := "ignore";
init : integer := 0
);
port(
dpo
www.eeworm.com/read/159314/5585193
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity xor2 is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i0
www.eeworm.com/read/159314/5585194
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_f_4 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_logic
www.eeworm.com/read/159314/5585211
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ldce_1 is
generic(
cds_action : string := "ignore";
init : integer := 0
);
port(
q
www.eeworm.com/read/159314/5585213
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity ldcpe is
generic(
cds_action : string := "ignore";
init : integer := 0
);
port(
q :
www.eeworm.com/read/159314/5585214
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_sstl2_ii is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_
www.eeworm.com/read/159314/5585217
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvcmos18_s_2 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in
www.eeworm.com/read/159314/5585219
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvcmos25_s_2 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in
www.eeworm.com/read/159314/5585221
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobuf_lvcmos25_s_4 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in