代码搜索:verilog hdl 开发教程

找到约 10,000 项符合「verilog hdl 开发教程」的源代码

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www.eeworm.com/read/18028/771141

verilog

# BEGIN Project Options SET flowvendor = Foundation_iSE SET vhdlsim = True SET verilogsim = True SET workingdirectory = D:\work\ISE\c6 SET speedgrade = -12 SET simulationfiles = Behavioral SET asysymb
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verilog

# BEGIN Project Options SET flowvendor = Foundation_iSE SET vhdlsim = True SET verilogsim = True SET workingdirectory = D:\work\ISE\c5 SET speedgrade = -12 SET simulationfiles = Behavioral SET asysymb
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verilog

`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 16:06:45 09/12/2007 // Design Name: /
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verilog

`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 23:49:57 10/08/2007 // Design Name: /
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verilog

`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 18:02:53 10/08/2007 // Design Name: /
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verilog

`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 01:08:06 09/11/2007 // Design Name: /
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verilog

# BEGIN Project Options SET flowvendor = Foundation_iSE SET vhdlsim = True SET verilogsim = True SET workingdirectory = C:\work\ISE\c5 SET speedgrade = -12 SET simulationfiles = Behavioral SET asysymb
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verilog

memory_initialization_radix=10; memory_initialization_vector = 0 ,61 ,123,184,246 ,307 , 368 , 430 , 491 , 552 ,613 ,675 ,736 ,797 ,858 ,920 ,981 , 1042 , 1103 , 1164 , 12
www.eeworm.com/read/18028/771149

verilog

# BEGIN Project Options SET flowvendor = Foundation_iSE SET vhdlsim = True SET verilogsim = True SET workingdirectory = D:\work\ISE\c5 SET speedgrade = -12 SET simulationfiles = Behavioral SET asysymb
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verilog

`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 10:28:52 09/21/2007 // Design Name: /