代码搜索：trigger
找到约 3,730 项符合「trigger」的源代码
代码结果 3,730
www.eeworm.com/read/237875/13923218
c fet140_dma_15.c
//******************************************************************************
// MSP-FET430P140 Demo - DMA0/1/2, USART0 SPI 3-Wire SPI Slave P1.x Exchange
//
// Description: SPI Master communi
www.eeworm.com/read/237875/13923345
c fet140_dma_16.c
//******************************************************************************
// MSP-FET430P140 Demo - DMA0/1/2, USART1 SPI 3-Wire Master P1.x Exchange
//
// Description: SPI Master communicat
www.eeworm.com/read/237875/13923378
c fet140_dma_14.c
//******************************************************************************
// MSP-FET430P140 Demo - DMA0/1/2, USART0 SPI 3-Wire SPI Master P1.x Exchange
//
// Description: SPI Master commun
www.eeworm.com/read/205013/15329953
test laststmtchanges.test
# The author disclaims copyright to this source code. In place of
# a legal notice, here is a blessing:
#
# May you do good and not evil.
# May you find forgiveness for yourself and forgive oth
www.eeworm.com/read/111505/15511432
h hsdma.h
/************************************************************************
* *
* Copyright (C) SEIKO EPSON CORP. 1999 *
* *
* File name: hsdma.h *
* This is HSDMA dr
www.eeworm.com/read/108511/15585073
echo
#This is just an example command that repeats the first parameter passed by the player.
if variableisstring param0
chat trigger param0
end
endscript
www.eeworm.com/read/103743/15724323
h forward-inline.h
/*
* OpenVPN -- An application to securely tunnel IP networks
* over a single TCP/UDP port, with support for SSL/TLS-based
* session authentication and key exchange,
*
www.eeworm.com/read/285189/8862652
txt ft245_r_w.smp_dump.txt
State Machine - |FT245_R_W|TX_state
Name TX_state.TX_state1
TX_state.TX_state0 0
TX_state.TX_state1 1
State Machine - |FT245_R_W|RX_state
Name RX_state.RX_state1
RX_state.RX_state0 0
R
www.eeworm.com/read/379944/9171784
v testbench_simplememory.v
// Testbed for SDRAM model (simple)
// written by Chris Fester 4-2-00
`include "SimpleMemory.v"
`include "Memoryside.v"
module top;
reg [31:0] outsideAddr;
wire [31:0] A;
wire [31:0] D;
wire nRA
www.eeworm.com/read/379944/9171797
v testbench_avlmemory.v
// Testbed for SDRAM model with AVL implementation
// written by Chris Fester 4-5-00
`include "AVLMemory.v"
`include "Memoryside.v"
module top;
reg [31:0] outsideAddr;
wire [31:0] A;
wire [