代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/217282/14970998
cpp xsimtestbench_arch.cpp
#include "isim/work/delay_tbw1/testbench_arch.h"
static const char * HSimCopyRightNotice = "Copyright 2004-2005, Xilinx Inc. All rights reserved.";
#include "C:/Xilinx/vhdl/hdp/nt/ieee/std_logic_116
www.eeworm.com/read/9754/178006
syn nand_flash_cntl.syn
JDF B
// Created by Version 8.0
PROJECT nand_flash_cntl
DESIGN nand_flash_cntl Normal
DEVKIT LCMXO2280C-5T100C
ENTRY Mixed Verilog/VHDL
TESTFIXTURE ..\..\..\testbench\verilog\nfcm_tb.v
TESTDEP
www.eeworm.com/read/9754/178010
syn nand_flash_cntl.syn
JDF B
// Created by Version 8.0
PROJECT nand_flash_cntl
DESIGN nand_flash_cntl Normal
DEVKIT LCMXO2280C-5T100C
ENTRY Mixed Verilog/VHDL
TESTFIXTURE ..\..\..\testbench\vhdl\nfcm_tb.vhd
TESTDEPF
www.eeworm.com/read/18458/789710
transcript
# Reading C:/Modeltech_5.5f/win32/../tcl/vsim/pref.tcl
# do testbench.tdo
# Model Technology ModelSim SE vlog 5.5f Compiler 2002.01 Jan 7 2002
# -- Compiling module glbl
# Top level modules:
#
www.eeworm.com/read/18458/789794
transcript
# Reading C:/Modeltech_5.5f/win32/../tcl/vsim/pref.tcl
# do testbench.tdo
# Model Technology ModelSim SE vlog 5.5f Compiler 2002.01 Jan 7 2002
# -- Compiling module glbl
# Top level modules:
#
www.eeworm.com/read/18563/794125
vhd simtut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\SIMTUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:36:48 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
L
www.eeworm.com/read/18563/794129
vhd tut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\TUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:41:18 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBR
www.eeworm.com/read/18563/794133
vhd simtut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\SIMTUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:36:48 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
L
www.eeworm.com/read/18563/794135
vhd tut_tb.vhd
-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\TUT_TB.VHD
-- VHDL testbench created by
-- Xilinx's StateBench 1.01
-- Sat Oct 26 14:41:18 2002
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBR
www.eeworm.com/read/196869/5100323
cpp xsimtestbench_arch.cpp
#include "isim/work/gg/testbench_arch.h"
static const char * HSimCopyRightNotice = "Copyright 2004-2005, Xilinx Inc. All rights reserved.";
#include "C:/Xilinx/vhdl/hdp/nt/ieee/std_logic_1164/std_lo