代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/346298/3184860
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity testbench is
generic(
CLK_20MHZPERIOD : integer := 50;
BITRATE : integer := 51200
);
end testbench;
www.eeworm.com/read/326120/3474487
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity testbench is
generic(
CLK_20MHZPERIOD : integer := 50;
BITRATE : integer := 51200
);
end testbench;
www.eeworm.com/read/326120/3474526
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity testbench is
generic(
CLK_20MHZPERIOD : integer := 50;
BITRATE : integer := 51200
);
end testbench;
www.eeworm.com/read/397063/2404485
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity testbench_rsdecoder is
generic(
clk_period : integer := 50
);
end testbench_rsdecoder;
www.eeworm.com/read/397063/2404588
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity testbench_rsdecoder is
generic(
clk_period : integer := 50
);
end testbench_rsdecoder;
www.eeworm.com/read/469641/6972575
v tb_cordic.v
`timescale 1ns/1ns
/*
CORDIC testbench
This testbench assumes the default settings for `defines
in the cordic.v file. If you change any of the defaults
www.eeworm.com/read/405559/11460485
v tb_cordic.v
`timescale 1ns/1ns
/*
CORDIC testbench
This testbench assumes the default settings for `defines
in the cordic.v file. If you change any of the defaults
www.eeworm.com/read/8785/153094
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity can_testbench is
generic(
tp : integer := 1;
brp : integer := 4
);
end can_testbench;
www.eeworm.com/read/17812/761170
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity can_testbench is
generic(
tp : integer := 1;
brp : integer := 4
);
end can_testbench;
www.eeworm.com/read/17870/763238
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity can_testbench is
generic(
tp : integer := 1;
brp : integer := 4
);
end can_testbench;