代码搜索:sync
找到约 6,244 项符合「sync」的源代码
代码结果 6,244
www.eeworm.com/read/160869/10480461
v pci_sync_module.v
//////////////////////////////////////////////////////////////////////
//// ////
//// File name "sync_module.v"
www.eeworm.com/read/160869/10480705
v pci_delayed_sync.v
//////////////////////////////////////////////////////////////////////
//// ////
//// File name "delayed_sync.v"
www.eeworm.com/read/350890/10701654
h sync_w32.h
//-< SYNC_W32.H >----------------------------------------------------*--------*
// FastDB Version 1.0 (c) 1999 GARRET * ? *
// (Main Memory Database Management Syst
www.eeworm.com/read/420653/10782795
v uart_sync_flops.v
//////////////////////////////////////////////////////////////////////
//// ////
//// uart_sync_flops.v
www.eeworm.com/read/468046/6998458
tex class_sync_order.tex
\section{Sync\-Order Class Reference}
\label{class_sync_order}\index{SyncOrder@{SyncOrder}}
\subsection*{Public Member Functions}
\begin{CompactItemize}
\item
{\bf Sync\-Order} (string user\-Id, stri
www.eeworm.com/read/468046/6998621
html class_sync_order.html
DoxygenProj: SyncOrder Class Reference
www.eeworm.com/read/259820/7148039
vhd rx_sync_comp.vhd
-- Altera Microperipheral Reference Design Version 0802
--------------------------------------------------------
--
-- FILE NAME : rx_sync_comp.vhd
-- PROJECT : Altera A8251
--
--Copyright
www.eeworm.com/read/259820/7148066
vhd proc_sync_reg.vhd
-- Altera Microperipheral Reference Design Version 0802
--------------------------------------------------------
--
-- FILE NAME : Proc_synch_reg.vhd
-- PROJECT : Altera A8251
--
--
--Copy
www.eeworm.com/read/259820/7148190
vhd rx_sync_stat.vhd
-- Altera Microperipheral Reference Design Version 0802
--**********************************************************************************************
--
-- System: A8251
-- Component: Rx
www.eeworm.com/read/463084/7188217
qmsg prev_cmp_sync.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 0