代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/374530/9399749
vhd clk.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity clk is
port(
clk : in std_logic;
address : out std_logic_vector(5 downto 0));
end clk;
a
www.eeworm.com/read/374530/9399781
vhd csout.vhd
library ieee;
Use ieee.std_logic_1164.all;
Entity csout is
port(data:in std_logic_vector(7 downto 0);
cs:in std_logic;
dout:out std_logic_vector(7 downto 0)
);
end csout;
www.eeworm.com/read/374530/9399799
vhd counter4.vhd
--counter4
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity counter4 is
port(clk,clr:in std_logic;
bcd:out std_logic_vecto
www.eeworm.com/read/374530/9399803
vhd counter3.vhd
--counter3
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity counter3 is
port(clk,clr:in std_logic;
bcd:out std_logic_vect
www.eeworm.com/read/374530/9399819
vhd flash.vhd
--flash
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
use IEEE.std_logic_arith.all;
entity flash is
port(clk,en:in std_logic;
beam:in std_logic_vector(6 downt
www.eeworm.com/read/374530/9399829
vhd seealarm.vhd
-- seealarm, conctrol displaying the alarm modle
Library IEEE;
use IEEE.std_logic_1164.all;
entity seealarm is
port(en:in std_logic;
norm:in std_logic_vector(1 downto 0);
q:out s
www.eeworm.com/read/374530/9399844
vhd counter4.vhd
--counter4
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity counter4 is
port(clk,clr:in std_logic;
bcd:out std_logic_vecto
www.eeworm.com/read/374530/9399849
vhd counter3.vhd
--counter3
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity counter3 is
port(clk,clr:in std_logic;
bcd:out std_logic_vect
www.eeworm.com/read/374530/9399864
vhd flash.vhd
--flash
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
use IEEE.std_logic_arith.all;
entity flash is
port(clk,en:in std_logic;
beam:in std_logic_vector(6 downt
www.eeworm.com/read/374530/9399875
vhd seealarm.vhd
-- seealarm, conctrol displaying the alarm modle
Library IEEE;
use IEEE.std_logic_1164.all;
entity seealarm is
port(en:in std_logic;
norm:in std_logic_vector(1 downto 0);
q:out s