代码搜索:std

找到约 10,000 项符合「std」的源代码

代码结果 10,000
www.eeworm.com/read/354981/10308487

vhd dff89.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY dff89 IS PORT( clk : IN STD_LOGIC; clear : IN STD_LOGIC; Din : IN STD_LOGIC_VECTOR(7 DOWNTO 0); Dout : OUT STD_LOGIC_VECTO
www.eeworm.com/read/354981/10308512

vhd dff15.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY dff15 IS PORT( clk : IN STD_LOGIC; clear : IN STD_LOGIC; Din : IN STD_LOGIC_VECTOR(15 DOWNTO 0); Dout : OUT STD_LOGIC_VECT
www.eeworm.com/read/354981/10308842

vhd dff8.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY dff8 IS PORT( clk : IN STD_LOGIC; clear : IN STD_LOGIC; Din : IN STD_LOGIC_VECTOR(7 DOWNTO 0); Dout : OUT STD_LOGIC_V
www.eeworm.com/read/354875/10317873

cmp ddr_sdram.cmp

-- Generated by DDR SDRAM Controller 3.2.0 [Altera, IP Toolbench v1.2.9 build43] -- ************************************************************ -- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS
www.eeworm.com/read/162264/10321567

vhd equ_pak.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; package equ_pak is subtype l_byte is std_logic_vector(11 downto 0); type std_togic_2d is array(natural range)of st
www.eeworm.com/read/161862/10359893

vhd count16.vhd

library ieee ; use ieee.std_logic_1164.all ; use ieee.std_logic_unsigned.all ; entity count16 is port(clk:in std_logic; D,C,B,A:out std_logic ); end count16 ; architecture behv of count
www.eeworm.com/read/425249/10367215

vhd testbench.vhd

--testbench.vhd library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity testbench is end entity; architecture one of testbench is component connect is port( inclk: in std_
www.eeworm.com/read/353880/10408650

vhd cfft.vhd

--------------------------------------------------------------------------------------------------- -- -- Title : cfft -- Design : cfft -- Author : ZHAO Ming -- email : sradio@o
www.eeworm.com/read/353880/10408690

vhd serparser.vhd

library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_ARITH.all; use IEEE.STD_LOGIC_UNSIGNED.all; -- Uncomment the following lines to use the declarations that are -- provided for instantia
www.eeworm.com/read/353880/10408737

vhd juntos.vhd

library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_ARITH.all; use IEEE.STD_LOGIC_UNSIGNED.all; -- Uncomment the following lines to use the declarations that are -- provided for instantia