代码搜索：shift
找到约 10,000 项符合「shift」的源代码
代码结果 10,000
www.eeworm.com/read/309860/13663534
cmp shift_pll.cmp
--Copyright (C) 1991-2002 Altera Corporation
--Any megafunction design, and related netlist (encrypted or decrypted),
--support information, device programming or simulation file, and any oth
www.eeworm.com/read/309860/13663535
csf shift_clk.csf
COMPILER_SETTINGS
{
RUN_TIMING_ANALYSES = ON;
MERGE_HEX_FILE = OFF;
FOCUS_ENTITY_NAME = |shift_clk;
FAMILY = Stratix;
DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2";
www.eeworm.com/read/309860/13663537
vwf shift_clk.vwf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
www.eeworm.com/read/309860/13663538
bdf shift_clk.bdf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
www.eeworm.com/read/309319/13674215
vhd ram_shift.vhd
-- PARALLE IN PARALLEL OUT SHIFTER IN THE ADDRESS GENERATION UNIT.
-- REQUIRED BECAUSE FFT IS COMPUTED ON DATA AND WRITTEN BACK INTO THE SAME
-- LOCATION AFTER 5 CYCLES. SO THE READ ADDRESS IS SHIFT
www.eeworm.com/read/309319/13674227
vhd shift2.vhd
-- SHIFT UNIT
library ieee ;
use ieee.std_logic_1164.all ;
use work.butter_lib.all ;
use ieee.std_logic_arith.all ;
use ieee.std_logic_unsigned.all ;
entity shift2 is
port (
sub_contr
www.eeworm.com/read/308995/13684548
cpp shift-prec.cpp
/*
* This file contains code from "C++ Primer, Fourth Edition", by Stanley B.
* Lippman, Jose Lajoie, and Barbara E. Moo, and is covered under the
* copyright and warranty notices given in that
www.eeworm.com/read/307021/13732916
vhd shift_siso.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY shift_siso IS
GENERIC(x : INTEGER := 8); --移位寄存器宽度
PORt(
--clk时钟，reset复位，direct移位方向,se移位使能，si串行
www.eeworm.com/read/304723/13788190
bsf shift_reg.bsf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
www.eeworm.com/read/304723/13788759
v shift_reg.v
/**************************************************
函数名：shift_reg
功 能：实现数据的并行输入串行输出
参数说明：clk 时钟
busy 忙信号，1时忙不能写入数值
0时可以写入新的数值
data_in 输入的数据