代码搜索：sequential
找到约 1,846 项符合「sequential」的源代码
代码结果 1,846
www.eeworm.com/read/393616/8273317
pdf automatic threshold setting for the sequential.pdf
www.eeworm.com/read/172784/9690554
c sci_alu_sequential_acc.c
/**********************************************************************
* $scientific_alu example -- PLI application using TF routines
*
* C model of a Scientific Arithmetic Logic Unit.
* Se
www.eeworm.com/read/172784/9690559
log sci_alu_sequential_test.log
Host command: C:\PROGRA~1\CDS\TOOLS\BIN\VERILOG.EXE
Command arguments:
sci_alu_sequential_test.v
Verilog_XL_Turbo_NT 2.6.9 log file created Jan 11, 1999 22:59:16
Verilog_XL_Turbo_NT 2.6.9
www.eeworm.com/read/172784/9690567
v sci_alu_sequential_shell.v
/**********************************************************************
* $scientific_alu example -- Verilog HDL shell module
*
* Scientific ALU C model, sequential logic version.
*
* Note:
www.eeworm.com/read/172784/9690576
v sci_alu_sequential_test.v
/**********************************************************************
* $scientific_alu example -- Verilog HDL test bench.
*
* Verilog test bench to test the $scientific_alu C model PLI
* a
www.eeworm.com/read/172784/9690709
log sci_alu_sequential_test.log
Host command: C:\PROGRA~1\CDS\TOOLS\BIN\VERILOG.EXE
Command arguments:
sci_alu_sequential_test.v
Verilog_XL_Turbo_NT 2.6.9 log file created Dec 28, 1998 01:19:34
Verilog_XL_Turbo_NT 2.6.9
www.eeworm.com/read/172784/9690716
c sci_alu_sequential_tf.c
/**********************************************************************
* $scientific_alu example -- PLI application using TF routines
*
* C model of a Scientific Arithmetic Logic Unit.
* Co
www.eeworm.com/read/172784/9690723
v sci_alu_sequential_shell.v
/**********************************************************************
* $scientific_alu example -- Verilog HDL shell module
*
* Scientific ALU C model, sequential logic version.
*
* Note:
www.eeworm.com/read/172784/9690732
v sci_alu_sequential_test.v
/**********************************************************************
* $scientific_alu example -- Verilog HDL test bench.
*
* Verilog test bench to test the $scientific_alu C model PLI
* a
www.eeworm.com/read/172784/9690783
c sci_alu_sequential_vpi.c
/**********************************************************************
* $scientific_alu example -- PLI application using VPI routines
*
* C model of a Scientific Arithmetic Logic Unit.
* S