代码搜索：parameter
找到约 10,000 项符合「parameter」的源代码
代码结果 10,000
www.eeworm.com/read/147731/12534435
old beam.desc.old
MDOLVersion: 8.0
CompilerOptions: warn
Task IBEAM
TaskHeader IBEAM
Version: 1.0
Evaluation: doestudy DOEStudy1
ControlMode: user
RunCounter: 21
www.eeworm.com/read/147731/12534446
ol1 beam.desc.ol1
MDOLVersion: 8.0
CompilerOptions: warn
Task IBEAM
TaskHeader IBEAM
Version: 1.0
Evaluation: doestudy DOEStudy1
ControlMode: user
RunCounter: 21
www.eeworm.com/read/147731/12534466
ol0 beam.desc.ol0
MDOLVersion: 8.0
CompilerOptions: warn
Task IBEAM
TaskHeader IBEAM
Version: 1.0
Evaluation: doestudy DOEStudy1
ControlMode: user
RunCounter: 21
www.eeworm.com/read/248907/12535026
c wt_mlme.c
#include "wtprecomp.h"
#if DBG
#define _FILENUMBER 'EMLM'
#endif
//Memory_OID gMemory_OID;//just for test
void InitMacStat(IN PWT_ADAPTER Adapter)
{
FN_ENTER;
TimerCancel( Adapter );
//W
www.eeworm.com/read/248907/12535051
c wt_mac.c
#include "wtprecomp.h"
#if DBG
#define _FILENUMBER 'CAMS'
#endif
void setWepBit( PWTWLAN_TXBUF PTxBuffer,char wb); //Have modified
/***********************************************/
/*
www.eeworm.com/read/335286/12541183
v wave2.v
`timescale 10ns/1ns
module wave2;
reg wave;
parameter cycle=5;
initial
fork
wave=0;
#(cycle) wave=1;
#(2*cycle) wave=0;
#(3*cycle) wave=1;
#(4*cycle) wave=0;
#(5*cycle) wave=
www.eeworm.com/read/335286/12541188
v adder.v
module adder(cout,sum,a,b,cin);
parameter size=16;
output cout;
output[size-1:0] sum;
input cin;
input[size-1:0] a,b;
assign {cout,sum}=a+b+cin;
endmodule
www.eeworm.com/read/335286/12541210
v wave1.v
`timescale 10ns/1ns
module wave1;
reg wave;
parameter cycle=10;
initial
begin
wave=0;
#(cycle/2) wave=1;
#(cycle/2) wave=0;
#(cycle/2) wave=1;
#(cycle/2) wave=0;
#(cycle/2
www.eeworm.com/read/335286/12541298
v rom.v
module ROM(addr,data,oe);
output[7:0] data;
input[14:0] addr;
input oe;
reg[7:0] mem[0:255];
parameter DELAY = 100;
assign #DELAY data=(oe==0) ? mem[addr] : 8'hzz;
initial $readmemh("rom.he
www.eeworm.com/read/335286/12541304
v test2.v
module test2;
reg clk1,clk2;
parameter CYCLE = 100;
always
begin
{clk1,clk2} = 2'b10;
#(CYCLE/4) {clk1,clk2} = 2'b01;
#(CYCLE/4) {clk1,clk2} = 2'b11;
#(CYCLE/4) {clk1,clk2} =