代码搜索：out_data
找到约 581 项符合「out_data」的源代码
代码结果 581
www.eeworm.com/read/162614/5540601
adb zlib.adb
----------------------------------------------------------------
-- ZLib for Ada thick binding. --
-- --
-- C
www.eeworm.com/read/162519/5547121
adb zlib.adb
----------------------------------------------------------------
-- ZLib for Ada thick binding. --
-- --
-- C
www.eeworm.com/read/112777/15477111
adb zlib.adb
----------------------------------------------------------------
-- ZLib for Ada thick binding. --
-- --
--
www.eeworm.com/read/167484/9967697
c fdct.c
#include "dct.h"
void dct_init(int * qtbl);
void dct(RAWDATA * in_data, DCTDATA * out_data );
static double divisors[DCTSIZE2];
void dct(RAWDATA * in_data, DCTDATA * out_data )
{
double
www.eeworm.com/read/461203/7231907
c fdct.c
#include "dct.h"
void dct_init(int * qtbl);
void dct(RAWDATA * in_data, DCTDATA * out_data );
static double divisors[DCTSIZE2];
void dct(RAWDATA * in_data, DCTDATA * out_data )
{
double
www.eeworm.com/read/102144/15792671
c fdct.c
#include "dct.h"
void dct_init(int * qtbl);
void dct(RAWDATA * in_data, DCTDATA * out_data );
static double divisors[DCTSIZE2];
void dct(RAWDATA * in_data, DCTDATA * out_data )
{
double
www.eeworm.com/read/284173/8957211
vhd ioadd.vhd
-- IO ADDRESS GENERATOR
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.all ;
use work.butter_lib.all ;
use ieee.std_logic_unsigned.all ;
entity ioadd_gen is
port (
www.eeworm.com/read/382928/8990073
vhd ioadd.vhd
-- IO ADDRESS GENERATOR
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.all ;
use work.butter_lib.all ;
use ieee.std_logic_unsigned.all ;
entity ioadd_gen is
port (
www.eeworm.com/read/282865/9055515
vhd ioadd.vhd
-- IO ADDRESS GENERATOR
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.all ;
use work.butter_lib.all ;
use ieee.std_logic_unsigned.all ;
entity ioadd_gen is
port (
www.eeworm.com/read/381043/9113937
vhd ioadd.vhd
-- IO ADDRESS GENERATOR
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.all ;
use work.butter_lib.all ;
use ieee.std_logic_unsigned.all ;
entity ioadd_gen is
port (