代码搜索：opcode
找到约 2,963 项符合「opcode」的源代码
代码结果 2,963
www.eeworm.com/read/324802/13243372
awk opcodedoc.awk
#
# Extract opcode documentation for sqliteVdbe.c and generate HTML
#
BEGIN {
print ""
print "SQLite Virtual Database Engine Opcodes"
print ""
}
/ Opcod
www.eeworm.com/read/239724/13259468
c udpclient.c
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
www.eeworm.com/read/239724/13259475
bak udpclient.c.bak
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
www.eeworm.com/read/324473/13261603
v alu.v
`define add 3'd0
`define minus 3'd1
`define band 3'd2
`define bor 3'd3
`define bnot 3'd4
module alu(out,opcode,a,b);
output[7:0] out;
reg[7:0] out;
input[2:0] opcode;
input[7:0] a,b;
alway
www.eeworm.com/read/138045/13270005
doc rnd_inst.doc
TIERRA Opcode Map Scrambler
- RND_INST -
by Daniel Pirone
PURPOSE:
This document describes a software tool that
www.eeworm.com/read/239507/13275426
cls clsasm.cls
VERSION 1.0 CLASS
BEGIN
MultiUse = -1 'True
Persistable = 0 'NotPersistable
DataBindingBehavior = 0 'vbNone
DataSourceBehavior = 0 'vbNone
MTSTransactionMode = 0 'NotAnMTSObject
www.eeworm.com/read/137539/13313882
v alu.v
`define add 3'd0
`define minus 3'd1
`define band 3'd2
`define bor 3'd3
`define bnot 3'd4
module alu(out,opcode,a,b);
output[7:0] out;
reg[7:0] out;
input[2:0] opcode;
input[7:0] a,b;
alway
www.eeworm.com/read/137022/13347793
c nr4hdr.c
/* Net/rom transport layer header conversion routines.
*/
#include "global.h"
#include "mbuf.h"
#include "nr4.h"
/* Convert a net/rom transport header to host format structure.
* Return -1 i
www.eeworm.com/read/321185/13411087
c disassembler.c
/* ----------------------------------------------------------------------------
* disassembler.c
* this module contains an 8051 disassembler
*
* Copyright 2003/2004
*
* This code was originally
www.eeworm.com/read/318986/13464729
v alu.v
`define add 3'd0
`define minus 3'd1
`define band 3'd2
`define bor 3'd3
`define bnot 3'd4
module alu(out,opcode,a,b);
output[7:0] out;
reg[7:0] out;
input[2:0] opcode;
input[7:0] a,b;
alway