代码搜索:mult

找到约 6,230 项符合「mult」的源代码

代码结果 6,230
www.eeworm.com/read/257336/11933506

v mult_for.v

module mult_for(outcome,a,b); parameter size=8; input[size:1] a,b; output[2*size:1] outcome; reg[2*size:1] outcome; integer i; always @(a or b) begin outcome=0; for(i=1; i
www.eeworm.com/read/257336/11933729

v mult.v

module mult(outcome,a,b); parameter size=8; input[size:1] a,b; output[2*size:1] outcome; assign outcome=a*b; endmodule
www.eeworm.com/read/256461/11998835

v mult_for.v

module mult_for(outcome,a,b); parameter size=8; input[size:1] a,b; output[2*size:1] outcome; reg[2*size:1] outcome; integer i; always @(a or b) begin outcome=0; for(i=1; i
www.eeworm.com/read/256461/11999049

v mult.v

module mult(outcome,a,b); parameter size=8; input[size:1] a,b; output[2*size:1] outcome; assign outcome=a*b; endmodule
www.eeworm.com/read/153835/12003344

bsf mult.bsf

/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to
www.eeworm.com/read/153835/12003384

v mult.v

// megafunction wizard: %LPM_MULT% // GENERATION: STANDARD // VERSION: WM1.0 // MODULE: lpm_mult // ============================================================ // File Name: mult.v // Megafu
www.eeworm.com/read/255611/12068822

inc mult.inc

FUNCTION mult ( dataa[7..0], datab[2..0] ) RETURNS ( result[10..0] );
www.eeworm.com/read/255611/12068824

bsf mult.bsf

//WARNING: Do NOT edit this file in a text editor! File corruption is VERY likely to occur. /* Copyright (C) 1988-1999 Altera Corporation Any megafunction design, and related net list (encrypted or
www.eeworm.com/read/255611/12068833

v mult.v

// megafunction wizard: %LPM_MULT% // GENERATION: STANDARD // VERSION: WM1.0 // MODULE: lpm_mult // ============================================================ // File Name: mult.v // Megafu
www.eeworm.com/read/255611/12068837

cmp mult.cmp

component mult PORT ( dataa : IN STD_LOGIC_VECTOR (7 DOWNTO 0); datab : IN STD_LOGIC_VECTOR (2 DOWNTO 0); result : OUT STD_LOGIC_VECTOR (10 DOWNTO 0) ); end component;