代码搜索:mult

找到约 6,230 项符合「mult」的源代码

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www.eeworm.com/read/195697/8135002

vhd mult.vhd

-- MULTIPLEXER TO CHOOSE BETWEEN CLOCK AND C0 library ieee ; use ieee.std_logic_1164.all ; use ieee.std_logic_arith.all ; use work.butter_lib.all ; use ieee.std_logic_unsigned.all ; entity mul
www.eeworm.com/read/195697/8135037

vhd mult.vhd

-- MULTIPLEXER TO CHOOSE BETWEEN CLOCK AND C0 library ieee ; use ieee.std_logic_1164.all ; use ieee.std_logic_arith.all ; use work.butter_lib.all ; use ieee.std_logic_unsigned.all ; entity mul
www.eeworm.com/read/246674/12713598

vhd mult.vhd

-- MULTIPLEXER TO CHOOSE BETWEEN CLOCK AND C0 library ieee ; use ieee.std_logic_1164.all ; use ieee.std_logic_arith.all ; use work.butter_lib.all ; use ieee.std_logic_unsigned.all ; entity mul
www.eeworm.com/read/144743/12774382

vhd mult.vhd

-- MULTIPLEXER TO CHOOSE BETWEEN CLOCK AND C0 library ieee ; use ieee.std_logic_1164.all ; use ieee.std_logic_arith.all ; use work.butter_lib.all ; use ieee.std_logic_unsigned.all ; entity mul
www.eeworm.com/read/144743/12774406

vhd mult.vhd

-- MULTIPLEXER TO CHOOSE BETWEEN CLOCK AND C0 library ieee ; use ieee.std_logic_1164.all ; use ieee.std_logic_arith.all ; use work.butter_lib.all ; use ieee.std_logic_unsigned.all ; entity mul
www.eeworm.com/read/144441/12789647

gif mult.gif

www.eeworm.com/read/245025/12826169

vhd mult.vhd

-- MULTIPLEXER TO CHOOSE BETWEEN CLOCK AND C0 library ieee ; use ieee.std_logic_1164.all ; use ieee.std_logic_arith.all ; use work.butter_lib.all ; use ieee.std_logic_unsigned.all ; entity mul
www.eeworm.com/read/244507/12859166

v mult_for.v

module mult_for(outcome,a,b); parameter size=8; input[size:1] a,b; output[2*size:1] outcome; reg[2*size:1] outcome; integer i; always @(a or b) begin outcome=0; for(i=1; i
www.eeworm.com/read/244507/12859433

v mult.v

module mult(outcome,a,b); parameter size=8; input[size:1] a,b; output[2*size:1] outcome; assign outcome=a*b; endmodule
www.eeworm.com/read/143521/12868162

v mult_for.v

module mult_for(outcome,a,b); parameter size=8; input[size:1] a,b; output[2*size:1] outcome; reg[2*size:1] outcome; integer i; always @(a or b) begin outcome=0; for(i=1; i