代码搜索:modelSim
找到约 1,834 项符合「modelSim」的源代码
代码结果 1,834
www.eeworm.com/read/324975/13235094
txt modulesim se 快速入门.txt
1.ModuleSim SE 快速入门
本文以<mark>ModelSim</mark> SE 5.6版本为基础,介绍<mark>ModelSim</mark> SE的最基本用法,高深的我也不会 。
当你安装完<mark>ModelSim</mark> SE之后,可以将你的<mark>ModelSim</mark> SE的起始路径设置为你的工作目录(如e:\verilog),具体方法是在右键单击执行文件<mark>ModelSim</mark> SE的图标再点击属性栏,就可以看到<mark>ModelSim</mark> SE的起始位置,改为你的 ...
www.eeworm.com/read/321790/13398627
rpt pll_ram.asm.rpt
Assembler report for pll_ram
Sun Dec 05 05:43:05 2004
Version 4.0 Build 190 1/28/2004 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2
www.eeworm.com/read/319379/13452859
mti multi.cr.mti
C:/multi/test_multi.v {1 {vlog -work work C:/multi/test_multi.v
Model Technology ModelSim SE vlog 6.1 Compiler 2005.06 Jun 6 2005
-- Compiling module test_booth
Top level modules:
test_booth
www.eeworm.com/read/309739/13665068
transcript
# Reading C:/Modeltech_6.0/tcl/vsim/pref.tcl
# // ModelSim SE 6.0 Aug 19 2004
# //
# // Copyright Mentor Graphics Corporation 2004
# // All Rights Reserved.
# //
# // THIS WORK
www.eeworm.com/read/109657/6173168
txt edit_mpf.txt
*****Copy the following line to the [vsim] section of your simulation.mpf.*****
Veriuser = $MG_LIB/mti_modelsim_verilog/libmgmm.so
www.eeworm.com/read/109657/6173174
txt edit_mpf.txt
*****Copy the following line to the [vsim] section of your simulation.mpf.*****
Veriuser = $MG_LIB/mti_modelsim_verilog/libmgmm.so
www.eeworm.com/read/480672/6659786
mti msehdft.cr.mti
E:/work/experiments/NOC_Routing/mesh_dft/inctl.v {1 {vlog -work work E:/work/experiments/NOC_Routing/mesh_dft/inctl.v
Model Technology ModelSim SE vlog 6.0 Compiler 2004.08 Aug 19 2004
-- Compiling
www.eeworm.com/read/478472/6717949
transcript
# Reading D:/Modelsim/tcl/vsim/pref.tcl
# OpenFile E:/DAT091/Labs/IESD_labs/IESD_labs/lab_3/lab_3/direct_implementation/direct_implementation.vhdl
www.eeworm.com/read/477386/6733980
txt 时序仿真.txt
查看Quartus 6.0的帮助文件,试验了一下可以进行时序仿真,以前看到过一些相关文章,但都没有成功,关键的一个问题就是没有编译库文件,总结步骤如下(本人用Verilog,括号中给出了用VHDL时的相关提示:
[注]Quartus版本为 6.0,<mark>ModelSim</mark>为 6.2a,其它版本可能稍有不同
方法一、根据Quartus帮助文件改写
1、File > Change Directo ...
www.eeworm.com/read/405549/11460671
_info2
m255
K3
Edecoder
Z1 w1081414508
Z2 DP ieee std_logic_1164 ChagfbCXBFdaC62b9Y:;