代码搜索：modelSim

找到约 1,834 项符合「modelSim」的源代码

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热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
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mti func_sim.cr.mti

D:/prj_D/modelsim_demo/func_sim/dpram8x32.v {1 {vlog -work work D:/prj_D/modelsim_demo/func_sim/dpram8x32.v Model Technology ModelSim SE vlog 5.8b Compiler 2004.01 Jan 26 2004 -- Compiling module dp
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www.eeworm.com/read/290161/8501140

lst netlist.lst

E:\modelsim\vr_fifo\par\vr_fifo.edn 1154101395 OK
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www.eeworm.com/read/430381/8752356

txt readme.txt

hex2dual.c ......... C source code for a program to convert a Intel hex file into a text file containing binary entries, 8 bit per line. keil.dua ........... Converted output fi
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www.eeworm.com/read/180232/9315045

txt readme.txt

hex2dual.c ......... C source code for a program to convert a Intel hex file into a text file containing binary entries, 8 bit per line. keil.dua ........... Converted output file
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www.eeworm.com/read/179993/9325190

txt readme.txt

hex2dual.c ......... C source code for a program to convert a Intel hex file into a text file containing binary entries, 8 bit per line. keil.dua ........... Converted output file
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www.eeworm.com/read/170176/9815271

txt readme.txt

hex2dual.c ......... C source code for a program to convert a Intel hex file into a text file containing binary entries, 8 bit per line. keil.dua ........... Converted output file
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www.eeworm.com/read/359648/10131643

txt readme.txt

hex2dual.c ......... C source code for a program to convert a Intel hex file into a text file containing binary entries, 8 bit per line. keil.dua ........... Converted output file
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www.eeworm.com/read/163363/10164812

txt readme.txt

hex2dual.c ......... C source code for a program to convert a Intel hex file into a text file containing binary entries, 8 bit per line. keil.dua ........... Converted output file
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www.eeworm.com/read/357728/10202427

txt readme.txt

hex2dual.c ......... C source code for a program to convert a Intel hex file into a text file containing binary entries, 8 bit per line. keil.dua ........... Converted output file
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www.eeworm.com/read/160075/10574542

me read.me

1. Directory structure * .\src VHDL source files of X_DCT virtual components * .\tb VHDL test bench of X_DCT, test bench configuration for RTL simulation, and behavioura
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