代码搜索：modelSim
找到约 1,834 项符合「modelSim」的源代码
代码结果 1,834
www.eeworm.com/read/315109/13551965
xrf alu_modelsim.xrf
vendor_name = ModelSim
source_file = 1, D:/alu/alu.vhd
source_file = 1, D:/alu/reg.vhd
source_file = 1, D:/alu/alu.vwf
design_name = alu
instance = comp, clk_aI, clk, alu, 1
instance = comp, OP_
www.eeworm.com/read/314787/13559294
pdf modelsim6.0.pdf
www.eeworm.com/read/310713/13645242
xrf dds_modelsim.xrf
vendor_name = ModelSim
source_file = 1, E:/My_Designs/max/dds.bdf
source_file = 1, D:/men.mif
source_file = 1, D:/Waveform1.vwf
source_file = 1, E:/My_Designs/max/lpm_rom0.v
source_file = 1, d:/a
www.eeworm.com/read/307113/13728865
v sram_modelsim.v
`timescale 1ns / 1ps
module sram_test(clk,
rst,
data1,
addr1,
ce1,
we1,
oe1,
data2,
addr2,
ce2,
we2
www.eeworm.com/read/306473/13744738
pdf simulation with modelsim.pdf
www.eeworm.com/read/390137/6279075
pdf modelsim6.0.pdf
www.eeworm.com/read/430277/6290772
sav modelsim.ini.sav
[Library]
others = $MODEL_TECH/../modelsim.ini
proasic3 = D:/Libero/Designer/lib/modelsim/precompiled/vlog/proasic3
syncad_vhdl_lib = D:\Libero\Designer/
www.eeworm.com/read/492682/6418912
sav modelsim.ini.sav
[Library]
others = $MODEL_TECH/../modelsim.ini
fusion = $MODEL_TECH/../actel/vlog/fusion
syncad_vhdl_lib = C:\Libero8.1\Designer/lib/actel/syncad_vhdl_lib
[vcom]
VHDL93 = 1
[vsim]
I
www.eeworm.com/read/491652/6432294
pdf debussy_modelsim.pdf
www.eeworm.com/read/488001/6503511