代码搜索：maxII
找到约 205 项符合「maxII」的源代码
代码结果 205
www.eeworm.com/read/143041/5759350
hif 11.hif
Version 4.2 Build 157 12/07/2004 SJ Web Edition
32
1552
OFF
OFF
OFF
OFF
OFF
FV_OFF
VRSM_ON
VHSM_ON
RETIME_OFF
REMAP_OFF
0
-- Start Partition --
|
ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP
O
www.eeworm.com/read/217144/4876023
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity maxii_io is
generic(
operation_mode : string := "input";
bus_hold : string := "false";
open_drain_output: string
www.eeworm.com/read/217144/4876027
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity maxii_lcell_register is
generic(
synch_mode : string := "off";
register_cascade_mode: string := "off";
power_up
www.eeworm.com/read/217144/4876034
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity maxii_ufm is
generic(
address_width : integer := 9;
init_file : string := "none";
lpm_type : string := "m
www.eeworm.com/read/217144/4876038
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity maxii_asynch_lcell is
generic(
operation_mode : string := "normal";
sum_lutc_input : string := "datac";
lut_mask
www.eeworm.com/read/208358/4993592
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity maxii_io is
generic(
operation_mode : string := "input";
bus_hold : string := "false";
open_drain_output: string
www.eeworm.com/read/208358/4993596
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity maxii_lcell_register is
generic(
synch_mode : string := "off";
register_cascade_mode: string := "off";
power_up
www.eeworm.com/read/208358/4993600
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity maxii_ufm is
generic(
address_width : integer := 9;
init_file : string := "none";
lpm_type : string := "m
www.eeworm.com/read/208358/4993601
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity maxii_asynch_lcell is
generic(
operation_mode : string := "normal";
sum_lutc_input : string := "datac";
lut_mask
www.eeworm.com/read/268991/4247979
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity maxii_io is
generic(
operation_mode : string := "input";
bus_hold : string := "false";
open_drain_output: string